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EPM3032ATC100-5N Datasheet(PDF) 6 Page - Altera Corporation |
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EPM3032ATC100-5N Datasheet(HTML) 6 Page - Altera Corporation |
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6 / 46 page  6 Altera Corporation MAX 3000A Programmable Logic Device Family Data Sheet Macrocells MAX 3000A macrocells can be individually configured for either sequential or combinatorial logic operation. Macrocells consist of three functional blocks: logic array, product–term select matrix, and programmable register. Figure 2 shows a MAX 3000A macrocell. Figure 2. MAX 3000A Macrocell Combinatorial logic is implemented in the logic array, which provides five product terms per macrocell. The product–term select matrix allocates these product terms for use as either primary logic inputs (to the OR and XOR gates) to implement combinatorial functions, or as secondary inputs to the macrocell’s register preset, clock, and clock enable control functions. Two kinds of expander product terms (“expanders”) are available to supplement macrocell logic resources: ■ Shareable expanders, which are inverted product terms that are fed back into the logic array ■ Parallel expanders, which are product terms borrowed from adjacent macrocells The Altera development system automatically optimizes product–term allocation according to the logic requirements of the design. Product- Term Select Matrix 36 Signals from PIA 16 Expander Product Terms LAB Local Array Parallel Logic Expanders (from other macrocells) Shared Logic Expanders Clear Select Global Clear Global Clocks Clock/ Enable Select 2 PRN CLRN Q ENA Register Bypass To I/O Control Block To PIA Programmable Register VCC D/T |
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