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AK8998W Datasheet(PDF) 9 Page - Asahi Kasei Microsystems |
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AK8998W Datasheet(HTML) 9 Page - Asahi Kasei Microsystems |
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9 / 59 page  [AK8998/W/D] MSxxxxx-E-00 - 9 - 2012/11 Reference Section & Others Block Functions V_Bandgap (VBG) V_Reference (VREF) I_Reference (IREF) Generates the reference voltage or bias current required for each circuit. Adjust the VREF voltage so that it is equivalent to 1.0V. VREF voltage adj. Resolution 3bits Adj. step 1% / step IREF current should be adjusted to 1.0V voltage across 1MΩ external resistor tied to VOUT pin. IREF current adj. Resolution 4bits Adj. step 2.8% / step Oscillator (OSC) Oscillator to generate timing sync signals for internal operation and sampling frequencies for sensor output signals. Oscillation frequency is adjusted as the counter result reaches the expected value, the internal counter counts for the period of CSCLK is high (2msec typ.). For the detail, refer to the Functional Description 1) Adjustment Procedure Description (Example). OSC adj. Resolution 4bits Adj. step 5% / step V_temp. (VTMP) Temperature sensor for converting the ambient temperature to voltage. Adjust the temperature sensor output voltage (VTMP voltage) so that it is equivalent to VREF voltage at 25ºC. A nd it is also possible to select the external temperature sensor by EEPROM in consideration of the case where a pressure sensor and the AK8998 are separated physically. When the external temperature sensor is chosen, the constant current of 50µA is sinked from the EXTMP pin to VSS. VTMP voltage adj.(internal) Resolution 6bits Adj. step 0.2% / step VTMP voltage adj.(external) Resolution 9bits (Rough/Fine=3/6bits) Adj. step Rough 10% /step / Fine 0.2% /step V_Common (VCOM) Generates analog circuit reference voltage 1/2VDD. The internal power-up circuit causes it to start up within the settling time for stable analog operation (Start Up valid time). AGND pin can be validated by EEPROM (EAGND[0]=1h). It is effective to improve the noise characteristic (See recommended connection examples for components). In the case of EAGND[0]=0h, the AGND pin is Hi-Z. Power ON Reset(POR) Power Up circuit is for stable analog operation upon power-up. In order to make the power-on reset effective, be sure to power up the supply voltage from below 0.1*VDD. Serial I/F Serial interface for accessing EEPROM and control register (volatile memory). It accesses using the CSCLK pin and the VOUT pin. EEPROM & Control Register EEPROM and control register (volatile memory). Used to store compensation values and measurement modes and to set up the measurement modes for adjustment. |
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