1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V

CC

SER IN

DRAIN0

DRAIN1

DRAIN2

DRAIN3

CLR

G

GND

SRCK

DRAIN7

DRAIN6

DRAIN5

DRAIN4

RCK

SER OUT

TLC6C598-Q1

D Package

(Top View)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V

CC

SER IN

DRAIN0

DRAIN1

DRAIN2

DRAIN3

CLR

G

GND

SRCK

DRAIN7

DRAIN6

DRAIN5

DRAIN4

RCK

SER OUT

TLC6C598-Q1

PW Package

(Top View)

TLC6C598-Q1

SLIS142B – DECEMBER 2012 – REVISED MARCH 2013

www.ti.com

DEVICE INFORMATION

PIN CONFIGURATIONS

Figure 3. PW-Package Pin Configuration of

Figure 4. D-Package Pin Configuration of

TLC6C598-Q1

TLC6C598-Q1

PIN FUNCTIONS

NAME

NO.

I/O

DESCRIPTION

CLR

7

I

Shift register clear, active-low

DRAIN0

3

O

Open-drain output

DRAIN1

4

O

Open-drain output

DRAIN2

5

O

Open-drain output

DRAIN3

6

O

Open-drain output

DRAIN4

11

O

Open-drain output

DRAIN5

12

O

Open-drain output

DRAIN6

13

O

Open-drain output

DRAIN7

14

O

Open-drain output

G

8

I

Output enable, active-low

GND

16

—

Power ground

RCK

10

I

Register clock

SER IN

2

I

Serial data input

SER OUT

9

O

Serial data output

SRCK

15

I

Shift register clock

1

I

Power supply

PIN DESCRIPTIONS

CLR is the signal used to clear all the registers. The storage register transfers data to the output buffer when

shift register clear (CLR) is high. Driving CLR low clears all the registers in the device.

DRAIN0–DRAIN7 are the LED current-sink channels. These pins connect to LED cathodes, and can survive up

to 40-V LED supply voltage. This is quite helpful during automotive load-dump conditions.

6

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