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MEMCMDQ2 Datasheet(PDF) 7 Page - Freescale Semiconductor, Inc |
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MEMCMDQ2 Datasheet(HTML) 7 Page - Freescale Semiconductor, Inc |
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7 / 82 page  MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4 Freescale Semiconductor 7 Electrical Characteristics 2.1.2 Power Supply Voltage Specification Table 2 provides the recommended operating conditions for the MPC8323E. Note that these values are the recommended and tested operating conditions. Proper device operation outside of these conditions is not guaranteed. Figure 2 shows the undershoot and overshoot voltages at the interfaces of the MPC8323E Figure 2. Overshoot/Undershoot Voltage for GVDD/OVDD Table 2. Recommended Operating Conditions3 Characteristic Symbol Recommended Value Unit Notes Core supply voltage VDD 1.0 V ± 50 mV V 1 PLL supply voltage AVDD 1.0 V ± 50 mV V 1 DDR1 and DDR2 DRAM I/O voltage GVDD 2.5 V ± 125 mV 1.8 V ± 90 mV V1 PCI, local bus, DUART, system control and power management, I2C, SPI, and JTAG I/O voltage OVDD 3.3 V ± 300 mV V 1 Junction temperature TA/TJ 0 to 105 °C2 Note: 1. GVDD, OVDD, AVDD, and VDD must track each other and must vary in the same direction—either in the positive or negative direction. 2. Minimum temperature is specified with TA; maximum temperature is specified with TJ. 3. All IO pins should be interfaced with peripherals operating at same voltage level. 4. This voltage is the input to the filter discussed in Section 24.2, “PLL Power Supply Filtering” and not necessarily the voltage at the AVDD pin, which may be reduced due to voltage drop across the filter. GND GND – 0.3 V GND – 0.7 V Not to Exceed 10% G/OVDD + 20% G/OVDD G/OVDD + 5% of tinterface 1 1. tinterface refers to the clock period associated with the bus clock interface. VIH VIL Note: |
Similar Part No. - MEMCMDQ2 |
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Similar Description - MEMCMDQ2 |
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