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ACPL-K34T-060E Datasheet(PDF) 6 Page - AVAGO TECHNOLOGIES LIMITED

Part # ACPL-K34T-060E
Description  Automotive 2.5 A Peak High Output Current MOSFET Gate Drive Optocoupler with Rail-to-Rail Output Voltage in Stretched SO8
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Manufacturer  AVAGO [AVAGO TECHNOLOGIES LIMITED]
Direct Link  http://www.avagotech.com
Logo AVAGO - AVAGO TECHNOLOGIES LIMITED

ACPL-K34T-060E Datasheet(HTML) 6 Page - AVAGO TECHNOLOGIES LIMITED

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Notes:
1. Maximum pulse width = 100 ns, Duty cycle = 2%.
2. Derate linearly above 110
°C free-air temperature at a rate of 13 mW/°C. Refer to Figure 2 from Output IC Power Dissipation Derating Chart.
3. Total power dissipation is derated linearly above 110
°C free-air temperature at a rate of 13 mW/°C. The maximum LED and IC junction temperature
should not exceed 150
°C.
4. Output is source at -2.0 A or 2.0 A with a maximum pulse width of 10 µs.
5. In this test VOH is measured with a DC load current. When driving capacitive loads VOH will approach VCC as IOH approaches zero amps.
6. Maximum pulse width = 1 ms.
7. This load condition approximates the gate load of a 600 V/50 A power MOSFET.
8. Pulse Width Distortion (PWD) is defined as tPHL-tPLH for any given device.
9. Dead Time Distortion (DTD) is defined as tPLH – tPHLbetween any two parts under the same test condition. A negative DTD reduces original system
dead time; while a positive DTD increases original system dead time.
10. Pin 2 and Pin 4 must be connected to LED common.
11. Common mode transient immunity in the high state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output
will remain in the high state, (i.e., VO > 10 V).
12. Common mode transient immunity in a low state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output
will remain in a low state (i.e., VO < 1.0 V).
13. In accordance with UL1577, each optocoupler is proof-tested by applying an insulation test voltage
≥ 6000 VRMS for 1 second.
14. Device considered a two-terminal device: pins 1, 2, 3 and 4 shorted together and pins 5, 6, 7 and 8 shorted together.
Figure 2. Output IC Power Dissipation Derating Chart
0
100
200
300
400
500
600
0
25
50
75
100
125
150
175
Po
Ta – AMBIENT TEMPERATURE – °C


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