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H5TQ2G63FFRTEI Datasheet(PDF) 9 Page - Hynix Semiconductor |
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H5TQ2G63FFRTEI Datasheet(HTML) 9 Page - Hynix Semiconductor |
9 / 33 page Rev. 1.0 / Nov. 2012 9 ROW AND COLUMN ADDRESS TABLE 2Gb Note1: Page size is the number of bytes of data delivered from the array to the internal sense amplifiers when an ACTIVE command is registered. Page size is per bank, calculated as follows: page size = 2 COLBITS * ORG 8 where COLBITS = the number of column address bits, ORG = the number of I/O (DQ) bits Configuration 256Mb x 8 128Mb x 16 # of Banks 8 8 Bank Address BA0 - BA2 BA0 - BA2 Auto precharge A10/AP A10/AP BL switch on the fly A12/BC A12/BC Row Address A0 - A14 A0 - A13 Column Address A0 - A9 A0 - A9 Page size 1 1 KB 2 KB |
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