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HMT41GU7MFR8C-H9 Datasheet(PDF) 8 Page - Hynix Semiconductor

Part # HMT41GU7MFR8C-H9
Description  DDR3 SDRAM Unbuffered DIMMs Based on 4Gb M-Die
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HMT41GU7MFR8C-H9 Datasheet(HTML) 8 Page - Hynix Semiconductor

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Rev. 1.1 / Jul. 2013
8
Pin Assignments
Front Side(left 1–60) Back Side(right 121–180) Front Side(left 61–120) Back Side(right 181–240)
Pin
#
x64
Non-ECC
x72
ECC
Pin
#
x64
Non-ECC
x72
ECC
Pin
#
x64
Non-ECC
x72
ECC
Pin
#
x64
Non-ECC
x72
ECC
1VREFDQ
VREFDQ 121
VSS
VSS
61
A2
A2
181
A1
A1
2VSS
VSS
122
DQ4
DQ4
62
VDD
VDD
182
VDD
VDD
3
DQ0
DQ0
123
DQ5
DQ5
63
CK1
CK1
183
VDD
VDD
4DQ1
DQ1
124
VSS
VSS
64
CK1CK1184
CK0
CK0
5
VSS
VSS
125
DM0
DM0
65
VDD
VDD
185
CK0CK0
6DQS0DQS0
126
NC
NC
66
VDD
VDD
186
VDD
VDD
7
DQS0
DQS0
127
VSS
VSS
67
VREFCA
VREFCA
187
NC
EVENT
8
VSS
VSS
128
DQ6
DQ6
68
NC
NC
188
A0
A0
9
DQ2
DQ2
129
DQ7
DQ7
69
VDD
VDD
189
VDD
VDD
10
DQ3
DQ3
130
VSS
VSS
70
A10
A10
190
BA12
BA12
11
VSS
VSS
131
DQ12
DQ12
71
BA02
BA02
191
VDD
VDD
12
DQ8
DQ8
132
DQ13
DQ13
72
VDD
VDD
192
RAS
RAS
13
DQ9
DQ9
133
VSS
VSS
73
WE
WE
193
S0S0
14
VSS
VSS
134
DM1
DM1
74
CAS
CAS
194
VDD
VDD
15
DQS1DQS1
135
NC
NC
75
VDD
VDD
195
ODT0
ODT0
16
DQS1
DQS1
136
VSS
VSS
76
S1
S1
196
A13
A13
17
VSS
VSS
137
DQ14
DQ14
77
ODT1
ODT1
197
VDD
VDD
18
DQ10
DQ10
138
DQ15
DQ15
78
VDD
VDD
198
NC
NC
19
DQ11
DQ11
139
VSS
VSS
79
NC
NC
199
VSS
VSS
20
VSS
VSS
140
DQ20
DQ20
80
VSS
VSS
200
DQ36
DQ36
21
DQ16
DQ16
141
DQ21
DQ21
81
DQ32
DQ32
201
DQ37
DQ37
22
DQ17
DQ17
142
VSS
VSS
82
DQ33
DQ33
202
VSS
VSS
23
VSS
VSS
143
DM2
DM2
83
VSS
VSS
203
DM4
DM4
24
DQS2DQS2144
NC
NC
84
DQS4DQS4
204
NC
NC
25
DQS2
DQS2
145
VSS
VSS
85
DQS4
DQS4
205
VSS
VSS
26
VSS
VSS
146
DQ22
DQ22
86
VSS
VSS
206
DQ38
DQ38
27
DQ18
DQ18
147
DQ23
DQ23
87
DQ34
DQ34
207
DQ39
DQ39
28
DQ19
DQ19
148
VSS
VSS
88
DQ35
DQ35
208
VSS
VSS
29
VSS
VSS
149
DQ28
DQ28
89
VSS
VSS
209
DQ44
DQ44
30
DQ24
DQ24
150
DQ29
DQ29
90
DQ40
DQ40
210
DQ45
DQ45
NC = No Connect; RFU = Reserved Future Use
1. NC pins should not be connected to anything on the DIMM, including bussing within the NC group.
2. Address pins A3–A8 and BA0 and BA1 can be mirrored or not mirrored.


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