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IS43DR83200A Datasheet(PDF) 5 Page - Integrated Silicon Solution, Inc |
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IS43DR83200A Datasheet(HTML) 5 Page - Integrated Silicon Solution, Inc |
5 / 48 page Integrated Silicon Solution, Inc. — www.issi.com 5 Rev. D 08/16/2012 IS43/46DR83200A, IS43/46DR16160A PIN CONFIGURATION PACKAGE CODE: B 60 BALL TW-BGA (Top View) (8.00 mm x 10.5 mm Body, 0.8 mm Ball Pitch) 1 2 3 4 5 6 7 8 9 A B C D E F G H J K L VDD DQ6 VDDQ DQ4 VDDL NC VSS VDD RDQS VSSQ DQ1 VSSQ VREF CKE BA0 A10 A3 A7 A12 VSS DM/RDQS VDDQ DQ3 VSS WE BA1 A1 A5 A9 NC VSSQ DQS VDDQ DQ2 VSSDL RAS CAS A2 A6 A11 NC DQS VSSQ DQ0 VSSQ CK CK CS A0 A4 A8 NC VDDQ DQ7 VDDQ DQ5 VDD ODT VDD VSS Not populated Pin name Function Pin name Function A0 to A12 Address inputs ODT ODT control BA0, BA1 Bank select VDD Supply voltage for internal circuit DQ0 to DQ7 Data input/output VSS Ground for internal circuit DQS, /DQS Differential data strobe VDDQ Supply voltage for DQ circuit /CS Chip select VSSQ Ground for DQ circuit /RAS, /CAS, /WE Command input VREF Input reference voltage CKE Clock enable VDDL Supply voltage for DLL circuit CK, /CK Differential clock input VSSDL Ground for DLL circuit DM Write data mask NC No connection RDQS, /RDQS Differential Redundant Data Strobe |
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