Micrel, Inc.

MIC24055

December 2012

2

M9999-120712-A

Ordering Information

Part Number

Switching Frequency

Voltage

Package

Junction Temperature

Range

Lead Finish

MIC24055YJL

600kHz

Adjustable

28-Pin 5mm

× 6mm QFN

−40°C to +125°C

Pb-Free

Pin Configuration

28-Pin 5mm

× 6mm QFN (JL)

(Top View)

Pin Description

Pin Number

Pin Name

Pin Function

1

PVDD

5V Internal Linear Regulator Output. PVDD supply is the power MOSFET gate drive supply voltage

and created by internal LDO from VIN. When VIN

< +5.5V, PVDD should be tied to PVIN pins. A

2.2µF ceramic capacitor from the PVDD pin to PGND (Pin 2) must be place next to the IC.

2, 5, 6, 7, 8,

21

PGND

Power Ground. PGND is the ground path for the MIC24055 buck converter power stage. The

PGND pins connect to the low-side N-Channel internal MOSFET gate drive supply ground, the

sources of the MOSFETs, the negative terminals of input capacitors, and the negative terminals of

output capacitors. The loop for the power ground should be as small as possible and separate from

the signal ground (SGND) loop.

3

NC

No Connect.

4, 9, 10,

11, 12

SW

Switch Node Output. Internal connection for the high-side MOSFET source and low-side MOSFET

drain. Due to the high-speed switching on this pin, the SW pin should be routed away from sensitive

nodes.

13,14,15,

16,17,18,19

PVIN

High-Side N-Internal MOSFET Drain Connection input. The PVIN operating voltage range is from

4.5V to 19V. Input capacitors between the PVIN pins and the power ground (PGND) are required to

keep the connection short.

20

BST

Boost Output. Bootstrapped voltage to the high-side N-channel MOSFET driver. A Schottky diode is

connected between the PVDD pin and the BST pin. A boost capacitor of 0.1μF is connected between

the BST pin and the SW pin. Adding a small resistor at the BST pin can slow down the turn-on time

of high-side N-Channel MOSFETs.