10

LTC1326/LTC1326-2.5

132625fc

Figure 3 contains a simple circuit for 5V systems that can’t

risk the RST output going high in the 3.1V to 4.15V range

(possibly due to very slow rise time on the 5V supply).

Diode D1 powers the LTC1326 while dropping

≈0.6V from

internal override circuit from being activated. Without the

LTC1326-2.5 Override Functions

operating off of a 2.5V supply will result in the continuous

assertion of RST.

Extending ESD Tolerance on the PBR Input Pin

The PBR pin is susceptible to ESD since it may be brought

out to a front panel in normal applications. The ESD

tolerance of this pin can be increased by adding a resistor

in series with the PBR pin. A 10k resistor can increase the

ESD tolerance of the PBR pin to approximately 10kV. The

PBR’s internal pull-up current of 7

µA typical means there

is only 70mV (150mV max) dropped across the resistor.

See Figure 5.

APPLICATIO S I FOR ATIO

PUSH-BUTTON

RESET

1

2

3

4

8

7

6

5

GND

PBR

SRST

RST

RST

LTC1326-2.5

3.3V

SYSTEM RESET

2.5V

R2

R1

1326

/2.5 F05

ADJUSTABLE SUPPLY

OR DC/DC FEEDBACK

DIVIDER

10k*

*OPTIONAL RESISTOR EXTENDS ESD TOLERANCE OF PBR INPUT TO APPROXIMATELY 10kV

Figure 5. Triple Supply Monitor (3.3V, 2.5V

and Adjustable) with Extended ESD Tolerance

1

2

3

4

8

7

6

5

GND

PBR

SRST

RST

RST

LTC1326

SYSTEM RESET

1326

/2.5 F03

5V

0.1

µF

4.7k

D1*

*MMBD914 OR EQUIVALENT

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

1326/2.5 F04

5

4

3

2

1

0

Figure 3. LTC1326 Monitoring a Single 5V Supply.

D1 Used to Avoid RST High Near 3.3V to 4V (See

Figure 2).

Figure 4. RST Output Voltage

Characteristics of the Circuit in Figure 3