TABLE 1. DEFINED INSTRUCTIONS

Op-Code R/W

# Data

DESCRIPTION

bytes

0x00

W

0

Instruction not implemented. No operation.

0x04

W

0

Software controlled Master Reset

0x08

W

1

Write Transmit Control Register

0x0C

W

4

Write ARINC 429 message to Transmit FIFO

0x18

W

3

Write Receiver 1 Priority-Label Match Registers. The data field consists of three eight-bit labels. The first data

byte is written to P-L filter #3, the second to P-L filter #2, and the last byte to filter #1

0x10

W

1

Write Receiver 1 Control Register

0x14

W

32

Write label values to Receiver 1 label memory. Starting with label 0xFF, consecutively set or reset each

label in descending order. For example, if the first data byte is programmed to 10110010 then labels FF,

FD FC and F9 will be set and FE, FB, FA and F8 will be reset.

0x24

W

1

Write Receiver 2 Control Register

0x28

W

32

Write label values to Receiver 2 label memory. Starting with label 0xFF, consecutively set or reset each

label in descending order. For example, if the first data byte is programmed to 10110010 then labels FF,

FD FC and F9 will be set and FE, FB, FA and F8 will be reset.

0x2C

W

3

Write Receiver 2 Priority-Label Match Registers. The data field consists of three eight-bit labels. The first

eight bits is written to P-L filter #3, the second to P-L filter #2, and the last byte to filter #1

0x34

W

1

Write Flag / Interrupt Assignment Register

0x38

W

1

Write ACLK Division Register

0x40

W

0

Transmit current contents of Transmit FIFO if Transmit Control Register bit 5 (TMODE) is a “0”

0x44

W

0

Software Reset. Clears the Transmit and Receive FIFOs and the Priority-Label Registers

0x48

W

0

Set all bits in Receiver 1 label memory to a “1”

0x4C

W

0

Set all bits in Receiver 2 label memory to a “1”

0x80

R

1

Read Transmit Status Register

0x84

R

1

Read Transmit Control Register

0x90

R

1

Read Receiver 1 Status Register

0x94

R

1

Read Receiver 1 Control Register

0x98

R

32

Read label values from Receiver 1 label memory.

0x9C

R

3

Read Receiver 1 Priority-Label Match Registers.

0xA0

R

4

Read one ARINC 429 message from the Receiver 1 FIFO

0xA4

R

3

Read Receiver 1 Priority-Label Register #1, ARINC429 bytes 2,3 & 4 (bits9-32)

0xA8

R

3

Read Receiver 1 Priority-Label Register #2, ARINC429 bytes 2,3 & 4 (bits9-32)

0xAC

R

3

Read Receiver 1 Priority-Label Register #3, ARINC429 bytes 2,3 & 4 (bits9-32)

0xB0

R

1

Read Receiver 2 Status Register

0xB4

R

1

Read Receiver 2 Control Register

0xB8

R

32

Read label values from Receiver 2 label memory.

0xBC

R

3

Read Receiver 2 Priority-Label Match Registers.

0xC0

R

4

Read one ARINC 429 message from the Receiver 2 FIFO

0xC4

R

3

Read Receiver 2 Priority-Label Register #1, ARINC429 bytes 2,3 & 4 (bits9-32)

0xC8

R

3

Read Receiver 2 Priority-Label Register #2, ARINC429 bytes 2,3 & 4 (bits9-32)

0xCC

R

3

Read Receiver 2 Priority-Label Register #3, ARINC429 bytes 2,3 & 4 (bits9-32)

0xD0

R

1

Read Flag / Interrupt Assignment Register

0xD4

R

1

Read ACLK Division Register

0xFF

R

0

Instruction not implemented. No operation.

HI-3593

HOLT INTEGRATED CIRCUITS

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