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ITR-D3T-SD6-A Datasheet(PDF) 6 Page - Source Photonics, Inc. |
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ITR-D3T-SD6-A Datasheet(HTML) 6 Page - Source Photonics, Inc. |
6 / 10 page ITR-D3T-SD6-A DS-5863 Rev 01 Table 8 - Microcontroller Specifications Parameter Minimum Typical Maximum Unit Notes Operating Voltage 3.14 3.30 3.46 V SDA a - - - - LVTTL, open collector serial data line from the I 2C bus to the on board Microcontroller. SCL b - - - - LVTTL, open collector serial clock line from the I 2 C bus to the on board Microcontroller. Reset hold c 30 - - ms LVTTL input, internal 50kΩ pull-up. Active Low Interrupt - - - - LVTTL output, internal 100kΩ pull-up. Active Low a I2C SDA and SCL must be open collector or open drain connections. b Clock stretching, as per paragraph 13.2 of the I2C Bus Standard, must be implemented to operate correctly. c Please see Table 9 and the timing diagram in Figure 2 below for the recommended system start-up sequence. Table 9 – Suggested Start-up Sequence Step Action 1 Power up the host system, with the RESET pin pulled to ground via a ≤4.7kΩ resistor. 2 Drive the RESET pin LOW. 3 Set the BEN control lines to disable the transmitter (BEN lines must be driven with differential logic). 4 Ensure power to the unit is on. 5 Drive the RESET pin HIGH to release the unit to become operational. 6 Wait approximately 250ms until the INTERRUPT pin goes LOW. 7 Read bytes A2.70/71/74/75 to clear the interrupt condition. Verify that byte A2.75 bit 7 was set. Use multi-byte read of bytes 70/71 and bytes 74/75. 8 Wait 50ms. Verify that the INTERRUPT pin has changed to HIGH. 9 The unit is now ready for normal operation. Figure 2 - Recommended transceiver module start-up sequence |
Similar Part No. - ITR-D3T-SD6-A |
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Similar Description - ITR-D3T-SD6-A |
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