L+

L-

GND

V

CC

CUR_OK

TX

MICRO

CONTROLLER

IOLINK

MASTER

CQ

LIM ADJ

RX

EN

V

SET

CC

WAKE

PWR_OK

SENSOR

V

IN

CC

SN65HVD101

SN65HVD101

SN65HVD102

www.ti.com

SLLSE84A – MAY 2011 – REVISED MARCH 2013

APPLICATION INFORMATION

N-Switch SIO Mode

Set TX pin High and use EN pin as the control to realize the function of N-switch (low-side driver) on the CQ pin.

EN

TX

CQ

L

H

Hi-Z

H

H

N-Switch

P-Switch SIO Mode

Set TX pin Low and use EN pin as the control to realize the function of P-switch (high-side driver) on the CQ pin.

EN

TX

CQ

L

L

Hi-Z

H

L

P-Switch

Push-Pull / Communication Mode

Set TX pin Low and use EN pin as the control to realize the function of P-switch (high-side driver) on the CQ pin.

EN

TX

CQ

L

X

Hi-Z

H

H

N-Switch

H

L

P-Switch

Wake up detection

The device may be in IO-Link mode or SIO mode. If the device is in SIO mode and the master node wants to

initiate communication with the device node, the master drives the CQ line to the opposite of its present state,

is typically 80 µs) depending on the CQ logic level as per the IO-LINK specification. The SN65HVD1XX IO-LINK

PHY detects this wake-up condition and communicates to the local microcontroller via the WAKE pin. The IO-

Link Communication Specification requires the device node to switch to receive mode within 500 microseconds

after receiving the Wake Up signal.

For over-current conditions shorter or longer than a valid Wake-Up pulse, the WAKE pin will remain in a high-

impedance (inactive) state. This is illustrated in Figure 7, and discussed in the following paragraph.

Copyright © 2011–2013, Texas Instruments Incorporated

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