1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

L+

WAKE

RX

TX

EN

Vcc IN

Vcc OUT

GND

TEMP_OK

NC

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

L+

WAKE

RX

TX

EN

Vcc IN

NC

GND

TEMP_OK

NC

HVD101

(Top View)

HVD102

(Top View)

SN65HVD101

SN65HVD102

www.ti.com

SLLSE84A – MAY 2011 – REVISED MARCH 2013

In normal operation, the PHY sets the output state of the CQ pin when the driver is enabled. During fault

conditions, the driver may be disabled by internal circuits.

Table 1. Driver Function

EN

TX

CQ

COMMENT

L or OPEN

X

Z

PHY is in ready-to-receive state

H

L

H

PHY CQ is sourcing current (high-side drive)

H

H or OPEN

L

PHY CQ is sinking current (low-side drive)

Table 2. Receiver Function

CQ Voltage

RX

Comment

VCQ < VTHL

H

Normal receive mode, input low

VTHL < VCQ < VTHH

?

Indeterminate output, may be either H or L

VTHH < VCQ

L

Normal receive mode, input high

OPEN

H

Failsafe output high

Table 3. Wake Up Function

EN

TX

CQ VOLTAGE

WAKE

COMMENT

L

X

X

Z

PHY is in ready-to-receive state

H

L

L

PHY receives High-level wake-up request from Master

H

X

?

Indeterminate output, may be either H or L

H

H

L

PHY receives Low-level wake-up request from Master

Table 4. Current Limit Indicator Function

CQ CURRENT

CUR_OK

COMMENT

|ICQ| < IO(LIM)

Z

Normal operation

|ICQ| > IO(LIM)

L

CQ current is at the internal limit

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