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HI-8591PDMF-40 Datasheet(PDF) 1 Page - Holt Integrated Circuits

Part # HI-8591PDMF-40
Description  ARINC 429 Line Receiver
Download  8 Pages
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Manufacturer  HOLTIC [Holt Integrated Circuits]
Direct Link  http://www.holtic.com
Logo HOLTIC - Holt Integrated Circuits

HI-8591PDMF-40 Datasheet(HTML) 1 Page - Holt Integrated Circuits

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HI-8591
DESCRIPTION
!
!
!
ARINC 429 line receiver interface in a
small outline package
Receiver input hysteresis at least 2 volt
Test inputs bypass analog inputs and
force digital outputs to a one, zero or
null state
!
!
!
!
3.3V single rail supply voltage
+/-30 V common-mode performance
>140 KOhm input impedance
Lightning protection simplified with the
ability to add 40 KOhm external series
resistors
FEATURES
PIN CONFIGURATIONS
SUPPLY VOLTAGES
FUNCTION TABLE
vcc = 3.3V
5.0V ± 10%
± 10%,
PIN DESCRIPTION TABLE
The HI-8591 is an ARINC 429 bus interface receiver
designed to operate from a single 3.3 V or 5 V supply. The
part is designed with high-impedance inputs to minimize
bus loading, and has an exceptional input common-mode
performance in excess of +/- 30V, making it immune to
ground offsets around the aircraft. The RINA and RINB
inputs of the standard HI-8591 may be connected directly
to the ARINC 429 bus. To enable external lightning protec-
tion circuitry to be added, the HI-8591-40 variant is avail-
able. The HI-8591-40 requires only the addition of external
40 K , ¼ watt resistors in series with RINA and RINB to
allow the part to meet the lightning protection requirements
of DO-160D level 3.
The typical 10 volt differential ARINC 429 signal is trans-
lated and input to a window comparator and latch. The
comparator levels are set just below the standard 6.5 volt
minimum ARINC data threshold and just above the stan-
dard 2.5 volt maximum ARINC null threshold.
The TESTA and TESTB inputs bypass the analog inputs for
testing purposes. Also if TESTA and TESTB are both taken
high, the digital outputs are forced to zero.
See Holt Application Note AN-300 for more information on
lightning protection.
W
(DS8591, Rev. H)
03/13
SYMBOL
FUNCTION
DESCRIPTION
VCC
SUPPLY
3.3V or 5V SUPPLY
TESTA
LOGIC INPUT
CMOS
RINB
ARINC INPUT
RECEIVER B INPUT
RINA
ARINC INPUT
RECEIVER A INPUT
GND
POWER
GROUND
ROUTA
LOGIC OUTPUT
RECEIVER CMOS OUTPUT A
ROUTB
LOGIC OUTPUT
RECEIVER CMOS OUTPUT B
TESTB
LOGIC INPUT
CMOS
-1.25V to 1.25V
-1.25V to 1.25V
0
0
0
0
-3.25V to -6.5V
3.25V to 6.5V
0
0
0
1
3.25V to 6.5V
-3.25V to -6.5V
0
0
1
0
XX
0
1
0
1
XX
1
0
1
0
XX
1
1
0
0
RINA
RINB
TESTA
TESTB ROUTA ROUTB
RINA - 4
TESTA - 2
VCC-1
RINB - 3
5 - GND
7 - ROUTB
8 - TESTB
6 - ROUTA
8 - PIN PLASTIC NARROW BODY SOIC
HI-8591PSI, HI-8591PST & HI-8591PSM
HI-8591PSI-40, HI-8591PST-40 & HI-8591PSM-40
16- pin 4mm x 4mm Chip-scale package
TESTA 1
RINB 2
RINA 3
NC 4
12 ROUTB
11 NC
10 ROUTA
9NC
HI-8591PCI, HI-8591PCT, HI-8591PCI-40 & HI-8591PCT-40
March 2013
ARINC 429
Line Receiver
HOLT INTEGRATED CIRCUITS
www.holtic.com


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