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HI-3583APCTF-15 Datasheet(PDF) 1 Page - Holt Integrated Circuits |
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HI-3583APCTF-15 Datasheet(HTML) 1 Page - Holt Integrated Circuits |
1 / 17 page HI-3582A, HI-3583A ARINC 429 3.3V Terminal IC with High-Speed Interface 52 - Pin Plastic Quad Flat Pack (PQFP) July 2013 (DS3582A Rev. C) 07/13 (Note: All 3 VDD pins be connected to the same 3.3V supply) must 64 - Pin Plastic 9mm x 9mm Chip-Scale Package GENERAL DESCRIPTION The HI-3582A/HI-3583A from Holt Integrated Circuits are silicon gate CMOS devices for interfacing a 16-bit parallel data bus directly to the ARINC 429 serial bus. The HI-3582A/HI-3583A design offers a high-speed host CPU interface compared with the earlier HI-3582/HI-3583 products. The device provides two receivers each with label recognition, 32 by 32 FIFO, and analog line receiver. Up to 16 labels may be programmed for each receiver. The independent transmitter has a 32 X 32 FIFO and a built-in line driver. The status of all three FIFOs can be monitored using the external status pins, or by polling the HI-3582A/HI-3583A status register. Other features include a programmable option of data or parity in the 32nd bit, and the ability to unscramble the 32 bit word. Also, versions are available with different values of input resistance and output resistance to allow users to more easily add external lightning protection circuitry. The 16-bit parallel data bus exchanges the 32-bit ARINC data word in two steps when either loading the transmitter or interrogating the receivers. The databus and all control signals are 3.3V CMOS compatible. The HI-3582A/HI-3583A apply the ARINC protocol to the receivers and transmitter. Timing is based on a 1 Mega- hertz clock. HI-3582APQI HI-3582APQT HI-3582APQM & HI-3583APQI HI-3583APQT HI-3583APQM 39 - N/C 38 - 37 - ENTX 36-V+ 35 - TXBOUT 34 - TXAOUT 33-V- 32 - 31 - 30 - TX/R 29 - 28 - 27 - BD00 CWSTR FFT HFT PL2 PL1 FF1 HF1 D/R2 FF2 HF2 EN1 EN2 -1 -2 -3 -4 -5 SEL - 6 -7 -8 BD15 - 9 BD14 - 10 BD13 - 11 BD12 - 12 BD11 - 13 FEATURES · · · · · · · · · · · · · ARINC specification 429 compatible High-speed 3.3V logic interface Dual receiver and transmitter interface directly to ARINC bus Programmable label recognition 32 x 32 FIFOs each receiver and transmitter Status register Data scramble control 32nd transmit bit can be data or parity Self test mode Low power Industrial & extended temperature ranges · Analog line driver and receivers connect On-chip 16 label memory for each receiver Independent data rate selection for transmitter and each receiver APPLICATIONS • Avionics data communication • Serial to parallel conversion • Parallel to serial conversion PIN CONFIGURATIONS (Top View) (See page 14 for additional pin configuration) 48 47 46 - N/C 45 - V+ 44 - TXBOUT 43 - TXAOUT 42 - V- 41 40 - 39 - 38 - TX/R 37 - 36 - 35 - 34 - BD01 - - ENTX - N/C BD00 33 - N/C CWSTR FFT HFT PL2 PL1 N/C - 1 -2 -3 -4 -5 -6 -7 SEL - 8 -9 -10 N/C - 11 BD15 - 12 D/R1 FF1 D/R2 FF2 HF2 EN1 EN2 HF1 BD14 - 13 BD13 - 14 BD12 - 15 BD11 - 16 See Note below HI-3582APCI HI-3582APCT HI-3582APCM & HI-3583APCI HI-3583APCT HI-3583APCM HOLT INTEGRATED CIRCUITS www.holtic.com ( |
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