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PBSS4021SPN Datasheet(PDF) 3 Page - NXP Semiconductors |
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PBSS4021SPN Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 20 page PBSS4021SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 13 October 2010 3 of 20 NXP Semiconductors PBSS4021SPN 20 V NPN/PNP low VCEsat (BISS) transistor 5. Limiting values [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. [3] Device mounted on a ceramic PCB, Al2O3, standard footprint. Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit TR1 (NPN) IC collector current - 7.5 A TR2 (PNP) IC collector current - −6.3 A Per transistor; for the PNP transistor with negative polarity VCBO collector-base voltage open emitter - 20 V VCEO collector-emitter voltage open base - 20 V VEBO emitter-base voltage open collector - 5 V ICM peak collector current single pulse; tp ≤ 1ms - 15 A IB base current - 1 A Ptot total power dissipation Tamb ≤ 25 °C [1] -0.73 W [2] -1 W [3] -1.7 W Per device Ptot total power dissipation Tamb ≤ 25 °C [1] -0.86 W [2] -1.4 W [3] -2.3 W Tj junction temperature - 150 °C Tamb ambient temperature −55 +150 °C Tstg storage temperature −65 +150 °C |
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