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ICS874001AGI-05LF Datasheet(PDF) 1 Page - Integrated Device Technology |
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ICS874001AGI-05LF Datasheet(HTML) 1 Page - Integrated Device Technology |
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1 / 18 page  DATA SHEET ICS874001AGI-05 REVISION A JANUARY 14, 2011 1 ©2011 Integrated Device Technology, Inc. PCI Express™ Jitter Attenuator ICS874001I-05 General Description The ICS874001I-05 is a high performance Jitter Attenuator designed for use in PCI Express™ systems. In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The ICS874001I-05 has a bandwidth of 6MHz with <1dB peaking, easily meeting PCI Express Gen2 PLL requirements. The ICS874001I-05 uses IDT’s 3RD Generation FemtoClock® PLL technology to achieve the lowest possible phase noise. The device is packaged in a small 20-pin TSSOP package, making it ideal for use in space constrained applications such as PCI Express add-in cards. Features • One differential LVDS output pair • One differential clock input • CLK, nCLK supports the following input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Input frequency range: 98MHz to 128MHz • Output frequency range: 98MHz to 640MHz • VCO range: 490MHz - 640MHz • Cycle-to-cycle jitter: 50ps (maximum) • Full 3.3V operating supply • PCI Express (2.5Gb/s) and Gen 2 (5 Gb/s) jitter compliant • -40°C to 85°C ambient operating temperature • Available in lead-free (RoHS 6) package 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 F_SEL0 VDDA F_SEL1 nc MR nc nc nc PLL_SEL VDD nc VDDO Q nQ nc nc GND nCLK CLK OE Pin Assignment Phase Detector VCO 490 - 640MHz Output Divider 0 0 ÷5 0 1 ÷4 1 0 ÷2 (default) 1 1 ÷1 ÷5 0 1 Internal Feedback Q nQ PLL_SEL CLK nCLK MR F_SEL[1:0] OE Pulldown Pullup/Pulldown Pullup Pullup Pullup Pulldown 2 ICS874001I-05 20-Lead TSSOP 6.5mm x 4.4mm x 0.925mm package body G Package Top View Block Diagram |
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