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DSPIC33FJMC202EML Datasheet(PDF) 1 Page - Microchip Technology |
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DSPIC33FJMC202EML Datasheet(HTML) 1 Page - Microchip Technology |
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1 / 330 page  © 2007-2012 Microchip Technology Inc. DS70283K-page 1 dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 Operating Conditions • 3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS • 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS Core: 16-bit dsPIC33F CPU • Code-efficient (C and Assembly) architecture • Two 40-bit wide accumulators • Single-cycle (MAC/MPY) with dual data fetch • Single-cycle mixed-sign MUL plus hardware divide Clock Management • 2% internal oscillator • Programmable PLLs and oscillator clock sources • Fail-Safe Clock Monitor (FSCM) • Independent Watchdog Timer (WDT) • Fast wake-up and start-up Power Management • Low-power management modes (Sleep, Idle, Doze) • Integrated Power-on Reset and Brown-out Reset • 1.35 mA/MHz dynamic current (typical) • 55 μA IPD current (typical) High-Speed PWM • Up to four PWM pairs with independent timing • Dead time for rising and falling edges • 12.5 ns PWM resolution • PWM support for: - DC/DC, AC/DC, Inverters, PFC, Lighting - BLDC, PMSM, ACIM, SRM • Programmable Fault inputs • Flexible trigger configurations for ADC conversions Advanced Analog Features • ADC module: - Configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H • Six analog inputs on 28-pin devices and up to nine analog inputs on 44-pin devices • Flexible and independent ADC trigger sources Timers/Output Compare/Input Capture • Three 16-bit timers/counters. Can pair up two to make one 32-bit. • Two Output Capture modules configurable as timers/counters • Four Input Capture modules • Peripheral Pin Select (PPS) to allow function remap Communication Interfaces • One UART module (10 Mbps) • With support for LIN 2.0 protocols and IrDA® • One 4-wire SPI module (15 Mbps) • One I2C™ module (up to 1 Mbaud) with SMBus support • PPS to allow function remap Input/Output • Sink/Source up to 10 mA (pin specific) for stan- dard VOH/VOL, up to 16 mA (pin specific) for non-standard VOH1 • 5V-tolerant pins • Selectable open drain, pull-ups, and pull-downs • Up to 5 mA overvoltage clamp current • External interrupts on all I/O pins Qualification and Class B Support • AEC-Q100 REVG (Grade 0 -40ºC to +150ºC) • Class B Safety Library, IEC 60730 Debugger Development Support • In-circuit and in-application programming • Two program and two complex data breakpoints • IEEE 1149.2-compatible (JTAG) boundary scan • Trace and run-time watch Packages Type SPDIP SOIC SSOP QFN-S QFN TQFP Pin Count 28 28 28 28 44 44 Contact Lead/Pitch .100'' 1.27 0.65 0.65 0.65 0.80 I/O Pins 21 21 21 21 35 35 Dimensions 1.365x.285x.135'' 17.9xx7.50x2.05 10.2x5.3x1.75 6x6x0.9 8x8x0.9 10x10x1 Note: All dimensions are in millimeters (mm) unless specified. 16-bit Digital Signal Controllers (up to 32 KB Flash and 2 KB SRAM) with Motor Control and Advanced Analog |
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