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A42MX24-FPL100B Datasheet(PDF) 15 Page - Microsemi Corporation |
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A42MX24-FPL100B Datasheet(HTML) 15 Page - Microsemi Corporation |
15 / 142 page 40MX and 42MX FPGA Families Re vi s i on 11 1 - 11 CEQ Values for Microsemi MX FPGAs Modules (CEQM)3.5 Input Buffers (CEQI)6.9 Output Buffers (CEQO)18.2 Routed Array Clock Buffer Loads (CEQCR)1.4 To calculate the active power dissipated from the complete design, the switching frequency of each part of the logic must be known. The equation below shows a piece-wise linear summation over all components. Power = VCCA2 * [(m x CEQM * fm)Modules + (n * CEQI * fn)Inputs + (p * (CEQO + CL) * fp)outputs + 0.5 * (q1 * CEQCR * fq1)routed_Clk1 + (r1 * fq1)routed_Clk1 + 0.5 * (q2 * CEQCR * fq2)routed_Clk2 + (r2 * fq2)routed_Clk2 (2) where: Fixed Capacitance Values for MX FPGAs (pF) m = Number of logic modules switching at frequency fm n = Number of input buffers switching at frequency fn p = Number of output buffers switching at frequency fp q1 = Number of clock loads on the first routed array clock q2 = Number of clock loads on the second routed array clock r1 = Fixed capacitance due to first routed array clock r2 = Fixed capacitance due to second routed array clock CEQM = Equivalent capacitance of logic modules in pF CEQI = Equivalent capacitance of input buffers in pF CEQO = Equivalent capacitance of output buffers in pF CEQC R = Equivalent capacitance of routed array clock in pF CL = Output load capacitance in pF fm = Average logic module switching rate in MHz fn = Average input buffer switching rate in MHz fp = Average output buffer switching rate in MHz fq1 = Average first routed array clock rate in MHz fq2 = Average second routed array clock rate in MHz Device Type r1 routed_Clk1 r2 routed_Clk2 A40MX02 41.4 N/A A40MX04 68.6 N/A A42MX09 118 118 A42MX16 165 165 A42MX24 185 185 A42MX36 220 220 |
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