Output Driver Capability and Loading

Freescale Semiconductor

10

4.4.1

Bias Resistor

The USBRBIAS resistor should be placed as close to the dedicated USB 2.0 pins as possible. The tolerance should be ±1%.

Figure 7. USBRBIAS Connection

5

Output Driver Capability and Loading

Table 6 lists values for drive capability and output loading.

the sink capability.

Signal

Drive

Capability

Output

SDRAMC (SDADDR[12:0], SDDATA[31:0], RAS, CAS, SDDM[3:0],

SDWE, SDBA[1:0]

24 mA

15 pF

SDRAMC DQS and clocks (SDDQS[3:0], SDRDQS, SDCLK[1:0],

SDCLK[1:0], SDCKE)

24 mA

15 pF

SDRAMC chip selects (SDCS[3:0])

24 mA

15 pF

FlexBus (AD[31:0], FBCS[5:0], ALE, R/W, BE/BWE[3:0], OE)

16 mA

30 pF

FEC (EnMDIO, EnMDC, EnTXEN, EnTXD[3:0], EnTXER

8 mA

15 pF

Timer (TOUT[3:0])

8 mA

50 pF

DACK[1:0]

8 mA

30 pF

PSC (PSCnTXD[3:0], PSCnRTS/PSCnFSYNC,

8 mA

30 pF

DSPI (DSPISOUT, DSPICS0/SS, DSPICS[2:3], DSPICS5/PCSS)

24 mA

50 pF

PCI (PCIAD[31:0], PCIBG[4:1], PCIBG0/PCIREQOUT, PCIDEVSEL,

PCICXBE[3:0], PCIFRM, PCIPERR, PCIRESET, PCISERR, PCISTOP,

PCIPAR, PCITRDY, PCIIRDY

16 mA

50 pF

I2C (SCL, SDA)

8 mA

50 pF

BDM (PSTCLK, PSTDDATA[7:0], DSO/TDO,

8 mA

25 pF

RSTO

8 mA

50 pF

9.1k

Ω

USBRBIAS