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ADuCM361 Datasheet(PDF) 7 Page - Analog Devices |
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ADuCM361 Datasheet(HTML) 7 Page - Analog Devices |
7 / 24 page Data Sheet ADuCM360/ADuCM361 Rev. B | Page 7 of 24 Parameter Test Conditions/Comments Min Typ Max Unit Average Input Current Drift1 Buffered Mode AIN0, AIN1, AIN2, AIN3 ±5 pA/°C AIN4, AIN5, AIN6, AIN7 ±16 pA/°C AIN8, AIN9, AIN10, AIN11 ±9 pA/°C Unbuffered Mode ±250 pA/V/°C Common-Mode Rejection, DC1 On ADC input ADC gain = 1, AVDD < 2 V 65 100 dB ADC gain = 1, AVDD > 2 V 80 100 dB ADC gain = 2 to 128 80 dB Common-Mode Rejection, 50 Hz/60 Hz1 50 Hz/60 Hz ± 1 Hz; fADC = 16.7 Hz, chop on; fADC = 50 Hz, chop off ADC gain = 1 97 dB ADC gain = 2 to 128 90 dB Normal-Mode Rejection, 50 Hz/60 Hz1 On ADC input 50 Hz/60 Hz ± 1 Hz; fADC = 16.7 Hz, chop on; fADC = 50 Hz, chop off 60 80 dB TEMPERATURE SENSOR1 After user calibration Voltage Output at 25°C Processor powered down or in standby mode before measurement 82.1 mV Voltage Temperature Coefficient (TC) 250 µV/°C Accuracy 6 °C GROUND SWITCH RON 3.7 10 19 Ω Allowable Current1 20 kΩ resistor off, direct short to ground 20 mA VOLTAGE REFERENCE ADC internal reference Internal VREF 1.2 V Initial Accuracy Measured at TA = 25°C −0.1 +0.1 % Reference Temperature Coefficient (TC)1, 10 −15 ±5 +15 ppm/°C Power Supply Rejection1 82 90 dB EXTERNAL REFERENCE INPUTS Input Range Buffered Mode AGND + 0.1 AVDD − 0.1 V Unbuffered Mode Minimum differential voltage between VREF+ and VREF− pins is 400 mV 0 AVDD V Input Current Buffered Mode −20 +10 +27 nA Unbuffered Mode 500 nA/V Normal-Mode Rejection1 80 dB Common-Mode Rejection1 85 100 dB Reference Detect Levels1 400 mV EXCITATION CURRENT SOURCES Output Current Available from each current source; value programmable from 10 µA to 1 mA 10 50 1000 μA Initial Tolerance at 25°C1 IOUT ≥ 50 µA ±5 % Drift1 Using internal reference resistor 100 400 ppm/°C Using external 150 kΩ reference resistor between IREF pin and AGND; resistor must have drift specification of 5 ppm/°C 75 400 ppm/°C Initial Current Matching at 25°C1 Matching between both current sources ±0.5 % Drift Matching1 50 ppm/°C Load Regulation, AVDD1 AVDD = 3.3 V 0.2 %/V Output Compliance1 IOUT = 10 µA to 210 µA AGND − 0.03 AVDD − 0.85 V IOUT > 210 µA AGND − 0.03 AVDD − 1.1 V |
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