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TNY379G Datasheet(PDF) 11 Page - Power Integrations, Inc. |
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TNY379G Datasheet(HTML) 11 Page - Power Integrations, Inc. |
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11 / 22 page  Rev. C 09/12 11 TNY375-380 www.powerint.com Y-Capacitor The placement of the Y-capacitor should be directly from the primary input filter capacitor positive terminal to the common/ return terminal of the transformer secondary. Such a placement will route high magnitude common mode surge currents away from the TinySwitch-PK device. Note – if an input π (C, L, C) EMI filter is used, then the inductor in the filter should be placed between the negative terminals on the input filter capacitors. Optocoupler Place the optocoupler physically close to the TinySwitch-PK device to minimize the primary side trace lengths. Keep the high current, high voltage drain and clamp traces away from the optocoupler to prevent noise pick up. Output Diode For best performance, the area of the loop connecting the secondary winding, the Output Diode, and the Output Filter Capacitor should be minimized. In addition, for axial diodes, sufficient copper area should be provided at the anode and cathode terminal of diode for heat sinking. A larger area is preferred at the quiet cathode terminal. A large anode area can increase high frequency radiated EMI. Quick Design Checklist As with any power supply design, all TinySwitch-PK designs should be verified on the bench to make sure that component specifications are not exceeded under worst case conditions. The following minimum set of tests is strongly recommended: 1. Maximum drain voltage – Verify the V DS does not exceed 650 V at highest input voltage and peak (overload) output power. The 50 V margin to the 700 V BV DSS specification gives margin for design variation. 2. Maximum drain current – At maximum ambient temperature, maximum input voltage, and peak output (overload) power, verify drain current waveforms for any signs of transformer saturation and excessive leading edge current spikes at startup. Repeat under steady state conditions and verify that the leading edge current spike event is below I INIT at the end of the t LEB(Min). Under all conditions the maximum drain current should be below the specified absolute maximum ratings. 3. Thermal Check – At specified maximum output power, minimum input voltage, and maximum ambient temperature, verify that the temperature specifications are not exceeded for TinySwitch-PK device, transformer, output diode, and output capacitors. Enough thermal margin should be allowed for part-to-part variation of the R DS(ON) of TinySwitch-PK device as specified in the data sheet. Under low-line maximum power, a maximum TinySwitch-PK device SOURCE pin temperature of 110 °C is recommended to allow for these variations. Design Tools Up-to-date information on design tools can be found at the Power Integrations web site: www.powerint.com. Figure 16. Layout Considerations for TinySwitch-PK Using P Package. TOP VIEW PI-4675-090712 Opto- coupler + - High-Voltage + - DC OUT Input Filter Capacitor Output Rectier Safety Spacing T r a n s f o r m e r PRI SEC BIAS BIAS R UV Bypass capacitor connection to device should be short Route connections to EN/UV pin (including undervoltage resistor) away from drain connected traces Copper area for heat sinking Return bias winding directly to input capacitor Maximize hatched copper areas ( ) for optimum heat sinking BP/M EN/UV Y1- Capacitor S S S S PRI C BP D |
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