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ADC128S022CIMT-NOPB Datasheet(PDF) 6 Page - Texas Instruments |
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ADC128S022CIMT-NOPB Datasheet(HTML) 6 Page - Texas Instruments |
6 / 26 page ADC128S022 SNAS334E – AUGUST 2005 – REVISED MARCH 2013 www.ti.com ADC128S022 Converter Electrical Characteristics (1) (continued) The following specifications apply for AGND = DGND = 0V, fSCLK = 0.8 MHz to 3.2 MHz, fSAMPLE = 50 ksps to 200 ksps, CL = 50pF, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C. Symbol Parameter Conditions Typical Limits(2) Units AC ELECTRICAL CHARACTERISTICS fSCLKMIN Minimum Clock Frequency VA = VD = +2.7V to +5.25V 0.8 MHz (min) fSCLK Maximum Clock Frequency VA = VD = +2.7V to +5.25V 16 3.2 MHz (max) 50 ksps (min) fS Sample Rate Continuous Mode VA = VD = +2.7V to +5.25V 1000 200 ksps (max) tCONVERT Conversion (Hold) Time VA = VD = +2.7V to +5.25V 13 SCLK cycles 30 40 % (min) DC SCLK Duty Cycle VA = VD = +2.7V to +5.25V 70 60 % (max) tACQ Acquisition (Track) Time VA = VD = +2.7V to +5.25V 3 SCLK cycles Acquisition Time + Conversion Time Throughput Time 16 SCLK cycles VA = VD = +2.7V to +5.25V tAD Aperture Delay VA = VD = +2.7V to +5.25V 4 ns ADC128S022 Timing Specifications The following specifications apply for VA = VD = +2.7V to +5.25V, AGND = DGND = 0V, fSCLK = 0.8 MHz to 3.2 MHz, fSAMPLE = 50 ksps to 200 ksps, and CL = 50pF. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C. Symbol Parameter Conditions Typical Limits(1) Units tCSH CS Hold Time after SCLK Rising Edge 0 10 ns (min) tCSS CS Setup Time prior to SCLK Rising Edge 4.5 10 ns (min) tEN CS Falling Edge to DOUT enabled 5 30 ns (max) tDACC DOUT Access Time after SCLK Falling Edge 17 27 ns (max) tDHLD DOUT Hold Time after SCLK Falling Edge 4 ns (typ) tDS DIN Setup Time prior to SCLK Rising Edge 3 10 ns (min) tDH DIN Hold Time after SCLK Rising Edge 3 10 ns (min) tCH SCLK High Time 0.4 x tSCLK ns (min) tCL SCLK Low Time 0.4 x tSCLK ns (min) DOUT falling 2.4 20 ns (max) tDIS CS Rising Edge to DOUT High-Impedance DOUT rising 0.9 20 ns (max) (1) Tested limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level). 6 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: ADC128S022 |
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