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EP3C10F256I7 Datasheet(PDF) 8 Page - Altera Corporation |
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EP3C10F256I7 Datasheet(HTML) 8 Page - Altera Corporation |
8 / 34 page 1–8 Chapter 1: Cyclone III Device Datasheet Electrical Characteristics Cyclone III Device Handbook July 2012 Altera Corporation Volume 2 Example 1–1 shows you the example to calculate the change of 50 I/O impedance from 25°C at 3.0 V to 85°C at 3.15 V: Pin Capacitance Table 1–9 lists the pin capacitance for Cyclone III devices. Example 1–1. R V = (3.15 – 3) × 1000 × –0.026 = –3.83 R T = (85 – 25) × 0.262 = 15.72 Because R V is negative, MFV = 1 / (3.83/100 + 1) = 0.963 Because R T is positive, MFT = 15.72/100 + 1 = 1.157 MF = 0.963 × 1.157 = 1.114 Rfinal = 50 × 1.114 = 55.71 Table 1–9. Cyclone III Devices Pin Capacitance Symbol Parameter Typical – QFP Typical – FBGA Unit CIOTB Input capacitance on top/bottom I/O pins 7 6 pF CIOLR Input capacitance on left/right I/O pins 7 5 pF CLVDSLR Input capacitance on left/right I/O pins with dedicated LVDS output 87 pF CVREFLR (1) Input capacitance on left/right dual-purpose VREF pin when used as VREF or user I/O pin 21 21 pF CVREFTB (1) Input capacitance on top/bottom dual-purpose VREF pin when used as VREF or user I/O pin 23 (2) 23 (2) pF CCLKTB Input capacitance on top/bottom dedicated clock input pins 76 pF CCLKLR Input capacitance on left/right dedicated clock input pins 6 5 pF Notes to Table 1–9: (1) When VREF pin is used as regular input or output, a reduced performance of toggle rate and tCO is expected due to higher pin capacitance. (2) CVREFTB for EP3C25 is 30 pF. |
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