ICS871002I-02 Data Sheet

PCI EXPRESS™ JITTER ATTENUATOR

ICS871002AGI-02 REVISION A APRIL 14, 2010

5

©2010 Integrated Device Technology, Inc.

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE: All parameters measured at f

≤ 250MHz unless noted otherwise.

NOTE 1: This parameter is defined in accordance with JEDEC Standard 65.

NOTE 2: Measurement taken from single ended waveform.

NOTE 3: Defined as the maximum instantaneous voltage including overshoot. See Parameter Measurement Information Section.

NOTE 4: Defined as the minimum instantaneous voltage including undershoot. See Parameter Measurement Information Section.

NOTE 5: Measurement taken from differential waveform.

NOTE 7: Measured at crossing point where the instantaneous voltage value of the rising edge of Q equals the falling edge of nQ.

NOTE 8: Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all crossing

points for this measurement.

NOTE 9: Defined as the total variation of all crossing voltages of rising Q and falling nQ, This is the maximum allowed variance in Vcross for

any particular system.

NOTE 10: Input duty cycle must be 50%.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Output Frequency

98

640

MHz

tjit(cc)

Cycle-to-Cycle Jitter; NOTE 1

PLL Mode

45

ps

Absolute Max. Output Voltage;

NOTE 2, 3

1150

mV

Absolute Min. Output Voltage;

NOTE 2, 4

-300

mV

Ringback Voltage; NOTE 5, 6

-100

100

mV

Absolute Crossing Voltage;

NOTE 2, 7, 8

200

550

mV

∆V

CROSS

all edges; NOTE 2, 7, 9

140

mV

Output Rise/Fall Time

measured between -150mV to +150mV

0.6

4.75

V/ns

odc

Output Duty Cycle; NOTE 10

48

52

%