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SI8421SV-C-IS Datasheet(PDF) 8 Page - Silicon Laboratories |
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SI8421SV-C-IS Datasheet(HTML) 8 Page - Silicon Laboratories |
8 / 30 page Si8410/20/21 8 Rev. 1.4 Table 4. Electrical Characteristics (VDD1 = 3.3 V ±10%, VDD2 = 3.3 V ±10%, TA = –40 to 125 °C) Parameter Symbol Test Condition Min Typ Max Unit High Level Input Voltage VIH 2.0 — — V Low Level Input Voltage VIL —— 0.8 V High Level Output Voltage VOH loh = –4 mA VDD1,VDD2 –0.4 3.1 — V Low Level Output Voltage VOL lol = 4 mA — 0.2 0.4 V Input Leakage Current IL —— ±10 µA Output Impedance1 ZO —85 — DC Supply Current (All inputs 0 V or at supply) Si8410Ax, Bx VDD1 VDD2 VDD1 VDD2 All inputs 0 DC All inputs 0 DC All inputs 1 DC All inputs 1 DC — — — — 0.8 0.8 1.8 0.8 1.2 1.2 2.7 1.2 mA Si8420Ax, Bx VDD1 VDD2 VDD1 VDD2 All inputs 0 DC All inputs 0 DC All inputs 1 DC All inputs 1 DC — — — — 1.0 1.3 3.0 1.4 1.5 2.0 4.5 2.1 mA Si8421Ax, Bx VDD1 VDD2 VDD1 VDD2 All inputs 0 DC All inputs 0 DC All inputs 1 DC All inputs 1 DC — — — — 1.3 1.3 2.3 2.3 2.0 2.0 3.5 3.5 mA 1 Mbps Supply Current (All inputs = 500 kHz square wave, CI = 15 pF on all outputs) Si8410Ax, Bx VDD1 VDD2 — — 1.3 0.9 2.0 1.4 mA Si8420Ax, Bx VDD1 VDD2 — — 2.0 1.6 3.0 2.4 mA Si8421Ax, Bx VDD1 VDD2 — — 1.9 1.9 2.9 2.9 mA Notes: 1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. 2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same supply voltages, load, and ambient temperature. 3. Start-up time is the time period from the application of power to valid data at the output. |
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