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Optimal Performance

With a 2-tone large input signal with the LMH6521 set to maximum gain (26dB) to drive an input signal

level at the ADC of

−1 dBFS, the SNR and SFDR results are shown in Table 1 compared to the stand

alone ADC16DV160 specifications.

Table 1. SNR and SFDR Results

Configuration

ADC Input

SNR (dBFS)

SFDR (dBFS)

LMH6521 + BPF + ADC16DV160

−1 dBFS

75.5

82

ADC16DV160 only

−1 dBFS

76

89

6

Optimal Performance

Placement of the LMH6521 relative to the ADC16DV160 is essential for optimal performance. It is

recommended that the amplifier be placed as close the ADC as possible and with excellent layout and

decoupling techniques to achieve the desired system performance. One way to improve channel isolation

is to place the output inductors of each channel of the LMH6521 90 degrees to reduce magnetic coupling

as shown in Figure 7. As a minimum, a 4-layer board should be utilized with one ground, one power, and

two signal layers. However, by adding more layers, thicker top and bottom metal layers, and additional

through vias will improve heat dissipation of the LMH6521 and improve performance.

The LMH6521 DVGA is well suited to drive Texas Instruments family of high speed MSPS data

converters: ADC10DV200, ADC12EU050, ADC12C170, ADC16V130, and ADC16DV160. Contact a

Texas Instruments representative to obtain documentation on the SP16160CH2RB reference design files.

Figure 7. Output Inductors at 90 Degrees

5

SNOA569A – November 2011 – Revised April 2013

AN-2195 Driving High Speed ADCs With the LMH6521 DVGA for High IF

AC-Coupled Applications

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