Technical Note

9/21

BR24T□□□□Series

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2011.03 - Rev.A

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・During internal write execution, all input commands are ignored, therefore ACK is not sent back.

・Data is written to the address designated by word address (n-th address)

・By issuing stop bit after 8bit data input, write to memory cell inside starts.

・When internal write is started, command is not accepted for tWR (5ms at maximum).

・By page write cycle, the following can be written in bulk :

Up to 8Byte

(BR24T01-W, BR24T02-W)

Up to 16Byte (BR24T04-W, BR24T08-W, BR24T16-W)

Up to 32Byte (BR24T32-W, BR24T64-W)

Up to 64Byte (BR24T128-W, BR24T256-W)

Up to 128Byte (BR24T512-W)

Up to 256Byte (BR24T1M-W)

And when data of the maximum bytes or higher is sent, data from the first byte is overwritten.

(Refer to "Internal address increment" of "Notes on page write cycle" in P10.)

・As for page write cycle of BR24T01-W and BR24T02-W, after the significant 4 bits (in the case of BR24T01-W) of word

address, or the significant 5 bits (in the case of BR24T02-W) of word address are designated arbitrarily, by continuing

data input of 2 bytes or more, the address of insignificant 3 bits is incremented internally, and data up to 8 bytes can be

written.

・As for page write command of BR24T04-W, BR24T08-W and BR24T16-W, after page select bit ’P0’(in the case of

BR24T04-W), after page select bit ’P0,P1’(in the case of BR24T08-W), after page select bit ’P0,P1,P2’(in the case of

BR24T16-W) of slave address are designated arbitrarily, by continuing data input of 2 bytes or more, the address of

insignificant 4 bits is incremented internally, and data up to 16 bytes can be written.

・As for page write cycle of BR24T32-W and BR24T64-W, after the significant 7 bits (in the case of BR24T32-W) of word

address, or the significant 8 bits (in the case of BR24T64-W) of word address are designated arbitrarily, by continuing

data input of 2 bytes or more, the address of insignificant 5 bits is incremented internally, and data up to 32 bytes can

be written.

・As for page write cycle of BR24T128-W and BR24T256-W, after the significant 8 bits (in the case of BR24T128-W) of

word address, or the significant 9 bits (in the case of BR24T256-W) of word address are designated arbitrarily, by

continuing data input of 2 bytes or more, the address of insignificant 6 bits is incremented internally, and data up to 64

bytes can be written.

・As for page write cycle of BR24T512-W after the significant 9 bits of word address is designated arbitrarily, by continuing

data input of 2 bytes or more, the address of insignificant 7 bits is incremented internally, and data up to 128 bytes can

be written.

・As for page write cycle of BR24T1M-W after page select bit ’P0’ and the significant 8 bit of word address are designated

arbitrarily, by continuing data input of 2 bytes or more, the address of insignificant 8 bits is incremented internally, and

data up to 256 bytes can be written.