PGA309

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SBOS292C – DECEMBER 2003 – REVISED JANUARY 2011

ELECTRICAL CHARACTERISTICS

PGA309

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

Front-End PGA + Output Amplifier

(1)

Fine gain adjust = 1

8 to 1152

V/V

Front-End PGA Gains: 4, 8, 16, 23.27, 32, 42.67, 64, 128

Output Amplifier gains: 2, 2.4, 3, 3.6, 4.5, 6, 9

Input Voltage Noise Density

f = 1kHz

210

nV/

√Hz

0.5

V/ms

6

ms

4.1

ms

0.002

%FSR

External Sensor Output Sensitivity

1 to 245

mV/V

Front-End PGA

Auto-Zero Internal Frequency

7

kHz

Offset Voltage (RTI)

(2)

Coarse offset adjust disabled

±3

±50

mV

vs Temperature

±0.2

mV/°C

±2

mV/V

vs Common-Mode Voltage

mV/V

Linear Input Voltage Range

(3)

0.2

V

Input Bias Current

0.1

1.5

nA

Input Impedance: Differential

30 || 6

G

Ω || pF

Input Impedance: Common-Mode

50 || 20

G

Ω || pF

Input Voltage Noise

4

PGA Gain

Gain Range Steps

4, 8, 16, 23.27, 32, 42.67, 64, 128

4 to 128

V/V

Initial Gain Error

0.2

±1

%

0.25

±1.2

%

0.3

±1.6

%

vs Temperature

10

ppm/°C

Output Voltage Range

V

Bandwidth

Gain = 4

400

kHz

Gain = 128

60

kHz

Coarse Offset Adjust

(RTI of Front-End PGA)

Range

±56

±59.5

±64

mV

vs Temperature

0.004

%/°C

Drift

±14 steps, 4-bit + sign

4

mV

Fine Offset Adjust (Zero DAC)

(RTO of the Front-End PGA)

(2)

Programming Range

0

V

Output Voltage Range

0.1

V

Resolution

65,536 steps, 16-bit DAC

73

mV

Integral Nonlinearity

20

LSB

Differential Nonlinearity

0.5

LSB

Gain Error

0.1

%

Gain Error Drift

10

ppm/°C

Offset

5

mV

Offset Drift

10

mV/°C

(1)

gain) × (Gain DAC).

(2)

RTI = Referred-to-input. RTO = referred to output.

(3)

The allowed common-mode and differential voltage depends on gain and offset settings. Refer to the Gain Scaling section for more

information.

Copyright © 2003–2011, Texas Instruments Incorporated

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