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501GLF Datasheet(PDF) 2 Page - Integrated Device Technology |
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501GLF Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 9 page ICS501 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 2 ICS501 REV R 051310 Pin Assignment Clock Output Table 0 = connect directly to ground 1 = connect directly to VDD M = leave unconnected (floating) Common Output Frequency Examples (MHz) Pin Descriptions X1/ I CLK VDD GND OE S1 S0 CLK X2 1 2 3 4 8 7 6 5 8 Pi n ( 150 mil) SOIC S1 S0 CLK Minimum Input 0 0 4X input per page 5 0 M 5.3125X input 20 MHz 0 1 5X input per page 5 M 0 6.25X input 4 MHz M M 2X input per page 5 M 1 3.125X input 8 MHz 1 0 6X input per page 5 1 M 3X input per page 5 1 1 8X input per page 5 Output 20 24 30 32 33.33 37.5 40 48 50 60 62.5 Input 10 12 10 16 16.66 12 10 12 16.66 10 20 Selection (S1, S0) M, M M, M 1, M M, M M, M M, 1 0, 0 0, 0 1, M 1, 0 M, 1 Output 64 66.66 72 75 80 83.33 90 100 106.25 120 125 Input 16 16.66 12 12 10 16.66 15 20 20 15 20 Selection (S1, S0) 0, 0 0, 0 1, 0 M, 0 1, 1 0, 1 1, 0 0, 1 0, M 1, 1 M, 0 Pin Number Pin Name Pin Type Pin Description 1 XI/ICLK Input Crystal connection or clock input. 2 VDD Power Connect to +3.3 V or +5 V. 3 GND Power Connect to ground. 4 S1 Tri-level Iinput Select 1 for output clock. Connect to GND or VDD or float. 5 CLK Output Clock output per table above. 6 S0 Tri-level Input Select 0 for output clock. Connect to GND or VDD or float. 7 OE Input Output enable. Tri-states CLK output when low. Internal pull-up. 8 X2 Output Crystal connection. Leave unconnected for clock input. |
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