MPC962305 REVISION 8 JANUARY 8, 2013

4

©2013 Integrated Device Technology, Inc.

MPC962305 Data Sheet

LOW-COST, 3.3V ZERO DELAY BUFFEr

1. All parameters are specified with loaded outputs.

Parameter

Name

Test Conditions

Min

Typ

Max

Unit

Output Frequency

30-pF load

10-pF load

10

10

100

133.33

MHz

MHz

2. Parameter is guaranteed by design and characterization. Not 100% tested in production.

40.0

50.0

60.0

%

Rise Time(2)

Measured between 0.8 V and 2.0 V

2.50

ns

Fall Time(2)

Measured between 0.8 V and 2.0 V

2.50

ns

Output to Output Skew(2)

All outputs equally loaded

250

ps

Delay, REF Rising Edge to

CLKOUT Rising Edge(2)

0

350

ps

Delay, REF Rising Edge to

CLKOUT Rising Edge(2)

MPC962309 device only

15

8.7

ns

Device to Device Skew(2)

0

700

ps

Cycle to Cycle Jitter(2)

Measured at 66.67 MHz, loaded outputs

200

ps

PLL Lock Time(2)

Stable power supply, valid clock presented on REF pin

1.0

ms

1. All parameters are specified with loaded outputs.

Parameter

Name

Test Conditions

Min

Typ

Max

Unit

Output Frequency

30-pF load

10-pF load

10

10

100

133.33

MHz

MHz

t1

2. Parameter is guaranteed by design and characterization. Not 100% tested in production.

40.0

50.0

60.0

%

Duty Cycle(2) = t2

t1

45.0

55.0

55.0

%

Rise Time(2)

Measured between 0.8 V and 2.0 V

1.50

ns

Fall Time(2)

Measured between 0.8 V and 2.0 V

1.50

ns

Output to Output Skew(2)

All outputs equally loaded

250

ps

Delay, REF Rising Edge to

CLKOUT Rising Edge(2)

0

350

ps

Delay, REF Rising Edge to

CLKOUT Rising Edge(2)

MPC962309 device only

15

8.7

ns

Device to Device Skew(2)

0

700

ps

Output Slew Rate(2)

Measured between 0.8 V and 2.0 V using Test Circuit #2

1

V/ns

Cycle to Cycle Jitter(2)

Measured at 66.67 MHz, loaded outputs

200

ps

PLL Lock Time(2)

Stable power supply, valid clock presented on REF pin

1.0

ms