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LMH0303 Datasheet(PDF) 6 Page - Texas Instruments |
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LMH0303 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 19 page LMH0303 SNLS285G – APRIL 2008 – REVISED APRIL 2013 www.ti.com DEVICE OPERATION INPUT INTERFACING The LMH0303 accepts either differential or single-ended input. For single-ended operation, the unused input must be properly terminated. OUTPUT INTERFACING The LMH0303 uses current mode outputs. Single-ended output levels are 800 mVP-P into 75Ω AC-coupled coaxial cable with an RREF resistor of 750Ω. The RREF resistor is connected between the RREF pin and VCC. The only resistor value that should be used for RREF is 750Ω. The RREF resistor should be placed as close as possible to the RREF pin. In addition, the copper in the plane layers below the RREF network should be removed to minimize parasitic capacitance. OUTPUT SLEW RATE CONTROL The LMH0303 output rise and fall times are selectable for either SMPTE 259M or SMPTE 424M / 292M compliance via the SD/HD pin. For slower rise and fall times, or SMPTE 259M compliance, SD/HD is set high. For faster rise and fall times, or SMPTE 424M and SMPTE 292M compliance, SD/HD is set low. SD/HD may also be controlled using the SMBus, provided the SD/HD pin is held low. SD/HD has an internal pulldown. OUTPUT ENABLE The SDO/SDO output driver can be enabled or disabled with the ENABLE pin. When set low, the output driver is powered off and the LMH0303 enters a deep power save mode. ENABLE has an internal pullup. INPUT LOS OF SIGNAL DETECTION (LOS) The LMH0303 detects when the input signal does not have a video-like pattern. Self oscillation and low levels of noise are rejected. This loss of signal detect allows a very sensitive input stage that is robust against coupled noise without any degradation of jitter performance. Via the SMBus, the loss of signal detect can either add an input offset or mute the outputs. An offset is added by default. Additionally, the loss of signal detect can be linked to the ENABLE functionality so that when the LOS goes low, ENABLE will also go low. OUTPUT CABLE DETECTION The LMH0303 detects when an output is locally terminated. When a video signal (or AC test signal) is present on SDI, the device senses the SDO and SDO amplitudes. If the output is not properly terminated (via a terminated cable or local termination), the amplitude will be higher than expected, and the Termination Fault signal is asserted. The Termination Fault signal is de-asserted when the proper termination is applied. This feature allows the system designer the flexibility to react to cable attachment and removal. Note that a long length of cable will look like a proper termination at the device output. The cable driver must be enabled for the termination detection to operate. If the Termination Fault will be used to power down the LMH0303, then periodic polling (enabling) is recommended to monitor the output termination. For example, when a Fault condition is triggered, ENABLE can be driven low to power down the device. The LMH0303 should be re-enabled periodically to check the status of the output termination. The LMH0303 needs to be powered on for roughly 4 ms for Termination Fault detection to work. SMBus Interface The System Management Bus (SMBus) is a two-wire interface designed for the communication between various system component chips. By accessing the control functions of the circuit via the SMBus, pincount is kept to a minimum while allowing a maximum amount of versatility. The LMH0303 has several internal configuration registers which may be accessed via the SMBus. The 7-bit default address for the LMH0303 is 17h. The LSB is set to 0b for a WRITE and 1b for a READ, so the 8-bit default address for a WRITE is 2Eh and the 8-bit default address for a READ is 2Fh. The SMBus address may be dynamically changed. 6 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LMH0303 |
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