R07DS1070EJ0200 Rev.2.00

Page 1 of 7

Jun 06, 2013

RJE0617JSP

–60V, –1.5A, P Channel Thermal FET

Power Switching

Description

This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in

over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of

high junction temperature like applying over power consumption, over current etc..

Features

• Logic level operation (3 V Gate drive).

• Built-in the over temperature shut-down circuit.

• High endurance capability against to the short circuit.

• Hysteresis type shut down operation.

• High density mounting.

• Built-in the current limitation circuit.

• Power supply voltage applies 12 V.

Outline

1 2

3

4

5

6

7

8

1, 3

Source

2, 4

Gate

5, 6, 7, 8 Drain

RENESAS Package code: PRSP0008DD-D

(Package name: SOP-8 (FP-8DAV))

MOS1

2

1

78

Gate Resistor

Temperature

Sensing

Circuit

Latch

Circuit

Gate

Shut-down

Circuit

Current

Limitation

Circuit

MOS2

4

3

56

Gate Resistor

Temperature

Sensing

Circuit

Latch

Circuit

Gate

Shut-down

Circuit

Current

Limitation

Circuit

Absolute Maximum Ratings

(Ta = 25°C)

Item

Symbol

Ratings

Unit

Drain to source voltage

–60

V

Gate to source voltage

–16

V

Gate to source voltage

2.5

V

Drain current

Note4

–1.5

A

Body-drain diode reverse drain current

–1.5

A

Avalanche current

Note 3

–1.5

A

Avalanche energy

Note 3

9.6

mJ

Channel dissipation

Pch

Note 1

1

W

Channel dissipation

Pch

Note 2

1.5

W

Channel temperature

Tch

150

°C

Storage temperature

Tstg

–55 to +150

°C

Notes: 1. 1 Drive operation : When using the glass epoxy board (FR4 40

× 40 × 1.6 mm), PW ≤ 10 s

2. 2 Drive operation : When using the glass epoxy board (FR4 40

× 40 × 1.6 mm), PW ≤ 10 s

3. Tch = 25

°C, Rg ≥ 50 Ω

4. It provides by the current limitation lower bound value.

R07DS1070EJ0200

Rev.2.00

Jun 06, 2013