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©2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6
8
Test Circuits
Pulse Gen
CM
V
V
FF
B
A
+-
+5 V
O
V
–
I
F
3
4
+
F
V
-
2
1
Shield
Noise
6
O
5
GND
7
8
V
B
V
CC
V
L
R
PLH
OL
V
VO
0
5 V
1.5 V
F
I
1.5 V
T
PHL
T
Switch at A : I = 0 mA
F
Switch at A : I = 16 mA
F
tr
VO
O
V
OL
V
5 V
0 V
10%
10%
90%
CM
V
10 V
4
5
Noise
1
2
3
Shield
8
7
6
+5 V
O
V
VCC
V01
V02
GND
VF1
-
+
F2
V
-
F
I
+
10% DUTY CYCLE
I/f < 100
µS
F
I
MONITOR
L
R
C = 15 pF
L
Pulse
Generator
tr = 5ns
Z = 50
O
Ω
GND
+
4
5
1
3
2
-
F2
V
VF1
-
Shield
Noise
+5 V
CC
8
V
L
V
6
02
V
7
R
01
VO
V
CM
A
B
Pulse Gen
F
I
+-
+
3
I Monitor
F
4
I/f < 100
µs
10% D.C.
tr = 5ns
Generator
Pulse
Z = 50
O
+
V
F
I
Ω
F
-
2
1
Shield
Noise
V
O
O
6
5
GND
7
8
V
B
V
L
R
CC
V
+5 V
0.1
µF
L
C = 15 pF
Test Circuit for 6N135M, 6N136M, and HCPL4503M
Test Circuit for HCPL2530M and HCPL2531M
0.1
µF
f
t
0.1
µF
0.1
µF
FF
V
m
R
m
R
90%
Fig. 7 Switching Time Test Circuit
Fig. 8 Common Mode Immunity Test Circuit
Test Circuit for 6N135M, 6N136M, and HCPL4503M
Test Circuit for HCPL2530M and HCPL2531M
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