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SM320F28335PTPMEP Datasheet(PDF) 10 Page - Texas Instruments |
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SM320F28335PTPMEP Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 167 page  SM320F28335-EP SPRS581D – JUNE 2009 – REVISED MAY 2012 www.ti.com Digital Signal Controller (DSC) 1 SM320F28335 DSC • Three 32-Bit CPU Timers 1.1 Features • Serial Port Peripherals 12 • High-Performance Static CMOS Technology – Up to 2 CAN Modules – Up to 150 MHz (6.67-ns Cycle Time) – Up to 3 SCI (UART) Modules – 1.9-V/1.8-V Core, 3.3-V I/O Design – Up to 2 McBSP Modules (Configurable as • High-Performance 32-Bit CPU SPI) – IEEE-754 Single-Precision Floating-Point – One SPI Module Unit (FPU) ) – One Inter-Integrated-Circuit (I2C) Bus – 16 x 16 and 32 x 32 MAC Operations • 12-Bit ADC, 16 Channels – 16 x 16 Dual MAC – 80-ns Conversion Rate – Harvard Bus Architecture – 2 x 8 Channel Input Multiplexer – Fast Interrupt Response and Processing – Two Sample-and-Hold – Unified Memory Programming Model – Single/Simultaneous Conversions – Code-Efficient (in C/C++ and Assembly) – Internal or External Reference • Six Channel DMA Controller (for ADC, McBSP, • Up to 88 Individually Programmable, ePWM, XINTF, and SARAM) Multiplexed GPIO Pins With Input Filtering • 16-bit or 32-bit External Interface (XINTF) • JTAG Boundary Scan Support (1) – Over 2M x 16 Address Reach • Advanced Emulation Features • On-Chip Memory – Analysis and Breakpoint Functions – 256K x 16 Flash, 34K x 16 SARAM – Real-Time Debug via Hardware – 1K x 16 OTP ROM • Development Support Includes • Boot ROM (8K x 16) – ANSI C/C++ Compiler/Assembler/Linker – With Software Boot Modes (via SCI, SPI, – Code Composer Studio™ IDE CAN, I2C, McBSP, XINTF, and Parallel I/O) – DSP/BIOS™ – Standard Math Tables – Digital Motor Control and Digital Power • Clock and System Control Software Libraries – Dynamic PLL Ratio Changes Supported • Low-Power Modes and Power Savings – On-Chip Oscillator – IDLE, STANDBY, HALT Modes Supported – Watchdog Timer Module – Disable Individual Peripheral Clocks • GPIO0 to GPIO63 Pins Can Be Connected to • Package Options One of the Eight External Core Interrupts – Quad Flatpack With Power-Pad (PTP) • Peripheral Interrupt Expansion (PIE) Block That – Thin Quad Flatpack (PGF, Preview Only) Supports All 58 Peripheral Interrupts – MicroStar BGA™ (GHH) • 128-Bit Security Key/Lock – Plastic BGA (GJZ) – Protects Flash/OTP/RAM Blocks • Temperature Options: – Prevents Firmware Reverse Engineering – A: –40°C to 85°C (GHH) (PGF, GJZ, Preview • Enhanced Control Peripherals Only) – Up to 18 PWM Outputs – S: –40°C to 125°C (GJZ, Preview Only) – Up to 6 HRPWM Outputs With 150 ps MEP – Q: –40°C to 125°C (GJZ, Preview Only) Resolution – M: –55°C to 125°C (PTP, GJZ) – Up to 6 Event Capture Inputs – Up to 2 Quadrature Encoder Interfaces (1) IEEE Standard 1149.1-1990 Standard Test Access Port and – Up to 8 32-bit/Nine 16-bit Timers Boundary Scan Architecture 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 MicroStar BGA, Code Composer Studio, DSP/BIOS are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to Copyright © 2009–2012, Texas Instruments Incorporated specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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