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CY14V256LA Datasheet(PDF) 11 Page - Cypress Semiconductor

Part # CY14V256LA
Description  256-Kbit (32 K x 8) nvSRAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY14V256LA Datasheet(HTML) 11 Page - Cypress Semiconductor

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CY14V256LA
Document Number: 001-76295 Rev. *B
Page 11 of 22
Switching Waveforms
Figure 4. SRAM Read Cycle #1 (Address Controlled) [15, 16, 17]
Figure 5. SRAM Read Cycle #2 (CE and OE Controlled) [15, 17]
Address
Data Output
Address Valid
Previous Data Valid
Output Data Valid
t
RC
t
AA
t
OHA
Address Valid
Address
Data Output
Output Data Valid
Standby
Active
High Impedance
CE
OE
I
CC
t
HZCE
t
RC
t
ACE
t
AA
t
LZCE
t
DOE
t
LZOE
t
PU
t
PD
t
HZOE
Notes
15. WE must be HIGH during SRAM read cycles.
16. Device is continuously selected with CE and OE LOW.
17. HSB must remain HIGH during READ and WRITE cycles.


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