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CY14V256LA Datasheet(PDF) 6 Page - Cypress Semiconductor

Part # CY14V256LA
Description  256-Kbit (32 K x 8) nvSRAM
Download  22 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY14V256LA Datasheet(HTML) 6 Page - Cypress Semiconductor

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CY14V256LA
Document Number: 001-76295 Rev. *B
Page 6 of 22
Preventing AutoStore
The AutoStore function is disabled by initiating an AutoStore
disable sequence. A sequence of read operations is performed
in a manner similar to the Software STORE initiation. To initiate
the AutoStore disable sequence, the following sequence of CE
controlled read operations must be performed:
1. Read address 0x0E38 Valid READ
2. Read address 0x31C7 Valid READ
3. Read address 0x03E0 Valid READ
4. Read address 0x3C1F Valid READ
5. Read address 0x303F Valid READ
6. Read address 0x0B45 AutoStore Disable
The AutoStore is re-enabled by initiating an AutoStore enable
sequence. A sequence of read operations is performed in a
manner similar to the Software RECALL initiation. To initiate the
AutoStore enable sequence, the following sequence of CE
controlled read operations must be performed:
1. Read address 0x0E38 Valid READ
2. Read address 0x31C7 Valid READ
3. Read address 0x03E0 Valid READ
4. Read address 0x3C1F Valid READ
5. Read address 0x303F Valid READ
6. Read address 0x0B46 AutoStore Enable
If the AutoStore function is disabled or reenabled, a manual
STORE operation (Hardware or Software) must be issued to
save the AutoStore state through subsequent power down
cycles. The part comes from the factory with AutoStore enabled
and written 0x00 in all cells.
Data Protection
The CY14V256LA protects data from corruption during low
voltage conditions by inhibiting all externally initiated STORE
and write operations. The low-voltage condition is detected when
VCC < VSWITCH. If the CY14V256LA is in a write mode (both CE
and WE are LOW) at power up, after a RECALL or STORE, the
write is inhibited until the SRAM is enabled after tLZHSB (HSB to
output active). When VCCQ < VIODIS, I/Os are disabled (no
STORE takes place). This protects against inadvertent writes
during brown out conditions on VCCQ supply.
L
H
L
0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x0B46
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
AutoStore
Enable
Output data
Output data
Output data
Output data
Output data
Output data
Active[3]
L
H
L
0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x0FC0
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile
STORE
Output data
Output data
Output data
Output data
Output data
Output High Z
Active ICC2
[3]
L
H
L
0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x0C63
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile
RECALL
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Active[3]
Table 1. Mode Selection (continued)
CE
WE
OE
A14–A0
[1]
Mode
I/O
Power
Note
3. The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle.


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