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CY14ME064J1A Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY14ME064J1A
Description  64-Kbit (8 K x 8) Serial (I2C) nvSRAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY14ME064J1A Datasheet(HTML) 3 Page - Cypress Semiconductor

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CY14MB064J1A/CY14MB064J2A
CY14ME064J1A/CY14ME064J2A
Document Number: 001-70393 Rev. *I
Page 3 of 28
Pinout
Figure 1. 8-pin SOIC pinout
WP
SCL
1
2
3
4
5
A0
8
7
6
V
CC
SDA
A1
A2
V
Top View
not to scale
CY14MX064J1A
SS
WP
SCL
1
2
3
4
5
8
7
6
V
CC
SDA
A1
A2
Top View
not to scale
CY14MX064J2A
V
CAP
VSS
Pin Definitions
Pin Name
I/O Type
Description
SCL
Input
Clock. Runs at speeds up to a maximum of fSCL.
SDA
Input/Output I/O. Input/Output of data through I2C interface.
Output: Is open-drain and requires an external pull-up resistor.
WP
Input
Write Protect. Protects the memory from all writes. This pin is internally pulled LOW and hence can
be left open if not connected.
A2–A0 [3]
Input
Slave Address. Defines the slave address for I2C. This pin is internally pulled LOW and hence can
be left open if not connected.
VCAP
Power supply AutoStore Capacitor. Supplies power to the nvSRAM during power loss to STORE data from the
SRAM to nonvolatile elements. If not required, AutoStore must be disabled and this pin left as no
connect. It must never be connected to ground.
NC
No connect
No Connect. This pin is not connected to the die.
VSS
Power supply Ground
VCC
Power supply Power supply
Note
3. A0 pin is not available in CY14MX064J2A.


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