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MPC875CVR133 Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MPC875CVR133 Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 84 page MPC875/MPC870 PowerQUICC™ Hardware Specifications, Rev. 4 10 Freescale Semiconductor Thermal Characteristics This device contains circuitry protecting against damage due to high-static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for example, either GND or VDDH). 4 Thermal Characteristics Table 4 shows the thermal characteristics for the MPC875/MPC870. Table 3. Operating Temperatures Rating Symbol Value Unit Temperature 1 (standard) 1 Minimum temperatures are guaranteed as ambient temperature, T A. Maximum temperatures are guaranteed as junction temperature, TJ. TA(min) 0°C TJ(max) 95 °C Temperature (extended) TA(min) –40 °C TJ(max) 100 °C Table 4. MPC875/MPC870 Thermal Resistance Data Rating Environment Symbol Value Unit Junction-to-ambient1 1 Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, airflow, power dissipation of other components on the board, and board thermal resistance. Natural convection Single-layer board (1s) RθJA 2 2 Per SEMI G38-87 and JEDEC JESD51-2 with the single-layer board horizontal. 43 °C/W Four-layer board (2s2p) RθJMA 3 3 Per JEDEC JESD51-6 with the board horizontal. 29 Airflow (200 ft/min) Single-layer board (1s) RθJMA 3 36 Four-layer board (2s2p) RθJMA 3 26 Junction-to-board4 4 Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the board near the package. RθJB 20 Junction-to-case 5 5 Indicates the average thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1) with the cold plate temperature used for the case temperature. For exposed pad packages where the pad would be expected to be soldered, junction-to-case thermal resistance is a simulated value from the junction to the exposed pad without contact resistance. RθJC 10 Junction-to-package top6 6 Thermal characterization parameter indicating the temperature difference between the package top and the junction temperature per JEDEC JESD51-2. Natural convection ΨJT 2 Airflow (200 ft/min) ΨJT 2 |
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