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FMS3810KRC Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FMS3810KRC Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 11 page FMS3810/3815 PRODUCT SPECIFICATION 2 REV. 1.08 12/21/00 Functional Description Within the FMS3810/3815 are three identical 10-bit D/A converters, each with a current source output. External loads are required to convert the current to voltage outputs. Data inputs RGB7-0 are overridden by the BLANK input. SYNC = H activates, sync current from IOS for sync-on-green video signals. Digital Inputs All digital inputs are TTL-compatible. Data is registered on the rising edge of the CLK signal. Following one stage of pipeline delay, the analog output changes tDO after the rising edge of CLK. SYNC and BLANK SYNC and BLANK inputs control the output level (Figure 1 and Table 1) of the D/A converters during CRT retrace intervals. BLANK forces the D/A outputs to the blanking level while SYNC = L turns off a current source that is connected to the green D/A converter. SYNC = H adds a 40 IRE sync pulse to the green output, SYNC = L sets the green output to 0.0 Volts during the sync tip. SYNC and BLANK are registered on the rising edge of CLK. Figure 1. Nominal Output Levels BLANK gates the D/A inputs and sets the pedestal voltage. If BLANK = H, the D/A inputs are added to a pedestal which offsets the current output. If BLANK = L, data inputs and the pedestal are disabled. D/A Outputs Each D/A output is a current source. To obtain a voltage output, a resistor must be connected to ground. Output voltage depends upon this external resistor, the reference voltage, and the value of the gain-setting resistor connected between RREF and GND. Normally, a source termination resistor of 75 Ohms is connected between the D/A current output pin and GND near the D/A converter. A 75 Ohm line may then be connected with another 75 Ohm termination resistor at the far end of the cable. This “double termination” presents the D/A converter with a net resistive load of 37.5 Ohms. The FMS3810/3815 may also be operated with a single 75 Ohm terminating resistor. To lower the output voltage swing to the desired range, the nominal value of the resistor on RREF should be doubled. Voltage Reference All three D/A converters are supplied with a common voltage reference. Internal bandgap voltage reference voltage is +1.235 Volts with a 3K Ω source resistance. An external voltage reference may be connected to the VREF pin, overriding the internal voltage reference. A 0.1µF capacitor must be connected between the COMP pin and VDD to stabilize internal bias circuitry and ensure low-noise operation. Power and Ground Required power is a single +5.0 Volt supply. To minimize power supply induced noise, analog +5V should be connected to VDD pins with 0.1 and 0.01 µF decoupling capacitors placed adjacent to each VDD pin or pin pair. High slew-rate of digital data makes capacitive coupling to the outputs of any D/A converter a potential problem. Since the digital signals contain high-frequency components of the CLK signal, as well as the video output signal, the resulting data feedthrough often looks like harmonic distortion or reduced signal-to-noise performance. All ground pins should be connected to a common solid ground plane for best performance. data: 660 mV max. pedestal: 54 mV sync: 286 mV |
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