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X9C103P Datasheet(PDF) 1 Page - Intersil Corporation |
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X9C103P Datasheet(HTML) 1 Page - Intersil Corporation |
1 / 10 page 1 ® FN8222.3 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006, 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9C102, X9C103, X9C104, X9C503 Digitally Controlled Potentiometer (XDCP™) The X9C102, X9C103, X9C104, X9C503 are Intersils’ digitally controlled (XDCP) potentiometers. The device consists of a resistor array, wiper switches, a control section, and non-volatile memory. The wiper position is controlled by a three-wire interface. The potentiometer is implemented by a resistor array composed of 99 resistive elements and a wiper switching network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS, U/D, and INC inputs. The position of the wiper can be stored in non-volatile memory and then be recalled upon a subsequent power-up operation. The device can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications ranging from control to signal processing to parameter adjustment. Pinout X9C102, X9C103, X9C104, X9C503 (8 LD SOIC, 8 LD PDIP) TOP VIEW Features • Solid-State Potentiometer • Three-Wire Serial Interface • 100 Wiper Tap Points - Wiper Position Stored in Non-volatile Memory and Recalled on Power-up • 99 Resistive Elements - Temperature Compensated - End-to-End Resistance, ±20% - Terminal Voltages, ±5V • Low Power CMOS -VCC = 5V - Active Current, 3mA max. - Standby Current, 750µA max. • High Reliability - Endurance, 100,000 Data Changes per Bit - Register Data Retention, 100 years • X9C102 = 1k Ω • X9C103 = 10k Ω • X9C503 = 50k Ω • X9C104 = 100k Ω • Packages - 8 Ld SOIC - 8 Ld PDIP • Pb-Free Available (RoHS Compliant) Block Diagram VCC CS VL/RL VW/RW INC U/D VH/RH VSS 1 2 3 4 8 7 6 5 7-BIT UP/DOWN COUNTER 7-BIT NON-VOLATILE MEMORY STORE AND RECALL CONTROL CIRCUITRY ONE OF HUNDRED DECODER RESISTOR ARRAY RL/VL RW/VW RH/VH U/D INC CS TRANSFER VCC ONE- GATES 99 98 97 96 2 1 0 GND UP/DOWN (INC) INCREMENT DEVICE (U/D) (CS) VCC (SUPPLY VOLTAGE) VSS (GROUND) CONTROL AND MEMORY GENERAL VH/RH RW/VW VL/RL SELECT DETAILED Data Sheet July 20, 2009 |
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