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AD9857AST Datasheet(PDF) 7 Page - Analog Devices

Part # AD9857AST
Description  CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9857AST Datasheet(HTML) 7 Page - Analog Devices

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AD9857
Rev. C| Page 7 of 40
Parameter
Temp
Test Level
Min
Typ
Max
Unit
POWER SUPPLY VSCURRENT3 (all power specifications at
VDD = 3.3 V, 25°C, REFCLK = 200 MHz)
Full Operating Conditions
25°C
I
540
615
mA
160 MHz Clock (×16)
25°C
I
445
515
mA
120 MHz Clock (×12)
25°C
I
345
400
mA
Burst Operation (25%)
25°C
I
395
450
mA
Single-Tone Mode
25°C
I
265
310
mA
Power-Down Mode
25°C
I
71
80
mA
Full-Sleep Mode
25°C
I
8
13.5
mA
1 Wake-up time refers to recovery from full-sleep mode. The longest time required is for the reference clock multiplier PLL to lock up (if it is being used). The wake-up
time assumes that there is no capacitor on DAC_BP, and that the recommended PLL loop filter values are used. The state of the reference clock multiplier lock can be
determined by observing the signal on the PLL_LOCK pin.
2 SYSCLK refers to the actual clock frequency used on-chip by the AD9857. If the reference clock multiplier is used to multiply the external reference frequency, the
SYSCLK frequency is the external frequency multiplied by the reference clock multiplier multiplication factor. If the reference clock multiplier is not used, the SYSCLK
frequency is the same as the external REFCLK frequency.
3 CIC = 2, INV SINC ON, FTW = 40%, PLL OFF, auto power-down between burst On, TxENABLE duty cycle = 25%.


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