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MC912D60CCPV8 Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc |
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MC912D60CCPV8 Datasheet(HTML) 9 Page - Freescale Semiconductor, Inc |
9 / 460 page Table of Contents MC68HC912D60A — Rev. 3.1 Technical Data Freescale Semiconductor Table of Contents 9 7.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 7.3 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 7.4 Flash EEPROM Control Block . . . . . . . . . . . . . . . . . . . . . . . . . 98 7.5 Flash EEPROM Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 7.6 Flash EEPROM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 7.7 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 7.8 Programming the Flash EEPROM . . . . . . . . . . . . . . . . . . . . . 101 7.9 Erasing the Flash EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . 103 7.10 Stop or Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 7.11 Flash protection bit FPOPEN . . . . . . . . . . . . . . . . . . . . . . . . . 104 Section 8. EEPROM Memory 8.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 8.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 8.3 EEPROM Selective Write More Zeros . . . . . . . . . . . . . . . . . . 106 8.4 EEPROM Programmer’s Model . . . . . . . . . . . . . . . . . . . . . . . 107 8.5 EEPROM Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . 108 8.6 Program/Erase Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 8.7 Shadow Word Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 8.8 Programming EEDIVH and EEDIVL Registers. . . . . . . . . . . . 116 Section 9. Resets and Interrupts 9.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 9.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 9.3 Maskable interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 9.4 Latching of Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 9.5 Interrupt Control and Priority Registers . . . . . . . . . . . . . . . . . 123 |
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