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AOZ8804ADI Datasheet(PDF) 7 Page - Alpha & Omega Semiconductors |
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AOZ8804ADI Datasheet(HTML) 7 Page - Alpha & Omega Semiconductors |
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7 / 11 page  AOZ8804A Rev. 1.0 October 2010 www.aosmd.com Page 7 of 11 High Speed PCB Layout Guidelines (Continued) Based on the AOZ8804A DFN-10 package design a very straight forward layout can be achieved. To give the TDR an extra level of margin the traces may be compensated to have a nominal impedance of 90 Ω for USB or 100Ω for HDMI throughout the differential pair. To make the design perfect the added capacitance of the device will have to be compensated by the use of “Skinny Traces”. The skinny traces are a narrow stripe line acting to lower the parasitic capacitance on the differential stripe line. The differential impedance of the transmission line becomes well centered to 90 Ω or to 100Ω. A layout EM field simulator is recommended before fabrication to insure a perfect stripe line. With careful layout and placement of the device, the AOZ8804A can protect the USB 3.0 and HDMI data line effectively and safely and meet the ESD immunity requirements of the IEC61000-4-2, level 4, ±15kV air discharge, ±8kV contact discharge. Figure 8. USB 3.0 PCB Layout with Compensated Traces . Number of Layers 4 Copper Trace Thickness 1.4 mils Dielectric Constant, ε r 4.6 Overall Board Thickness 62 mils Dielectric Thickness Between Top and Ground Layer 10 mils |
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