DAC0830, DAC0832

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SNAS534B – MAY 1999 – REVISED MARCH 2013

TI's linearity “end point test” (a) and the “best straight line” test (b,c) used by other suppliers are illustrated above.

The “end point test'' greatly simplifies the adjustment procedure by eliminating the need for multiple iterations of

checking the linearity and then adjusting full scale until the linearity is met. The “end point test'' ensures that

linearity is met after a single full scale adjust. (One adjustment vs. multiple iterations of the adjustment.) The “end

point test'' uses a standard zero and F.S. adjustment procedure and is a much more stringent test for DAC

linearity.

Power Supply Sensitivity: Power supply sensitivity is a measure of the effect of power supply changes on the

DAC full-scale output.

Settling Time: Settling time is the time required from a code transition until the DAC output reaches within

±½LSB of the final output value. Full-scale settling time requires a zero to full-scale or full-scale to zero output

change.

Full Scale Error: Full scale error is a measure of the output error between an ideal DAC and the actual device

Differential Nonlinearity: The difference between any two consecutive codes in the transfer curve from the

theoretical 1 LSB to differential nonlinearity.

Monotonic: If the output of a DAC increases for increasing digital input code, then the DAC is monotonic. An 8-

bit DAC which is monotonic to 8 bits simply means that increasing digital input codes will produce an increasing

analog output.

Figure 6. DAC0830 Functional Diagram

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