SN65HVD10, SN65HVD10Q, SN75HVD10

SN65HVD11, SN65HVD11Q, SN75HVD11

SN65HVD12, SN75HVD12

SLLS505K

– FEBRUARY 2002 – REVISED SEPTEMBER 2011

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION

PACKAGE

SIGNALING

UNIT LOADS

SOIC MARKING

RATE

PDIP

32 Mbps

1/2

SN65HVD10D

SN65HVD10P

VP10

10 Mbps

1/8

–40°C to 85°C

SN65HVD11D

SN65HVD11P

VP11

1 Mbps

1/8

SN65HVD12D

SN65HVD12P

VP12

32 Mbps

1/2

SN75HVD10D

SN75HVD10P

VN10

10 Mbps

1/8

–0°C to 70°C

SN75HVD11D

SN75HVD11P

VN11

1 Mbps

1/8

SN75HVD12D

SN75HVD12P

VN12

32 Mbps

1/2

SN65HVD10QD

SN65HVD10QP

VP10Q

–40°C to 125°C

10 Mbps

1/8

SN65HVD11QD

SN65HVD11QP

VP11Q

(1)

The D package is available taped and reeled. Add an R suffix to the part number (i.e., SN75HVD11DR).

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted

(1) (2)

UNIT

Supply voltage range

–0.3 V to 6 V

Voltage range at A or B

–9 V to 14 V

Input voltage range at D, DE, R or RE

Voltage input range, transient pulse, A and B, through 100

Ω, see Figure 11

–50 V to 50 V

Receiver output current

–11 mA to 11 mA

A, B, and GND

±16 kV

Electrostatic

All pins

±4 kV

discharge

All pins charge

±1 kV

Continuous total power dissipation

See Dissipation Rating Table

A, B, and GND

±4 kV

Junction temperature

170

°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.

(3)

Tested in accordance with JEDEC Standard 22, Test Method A114-A and IEC 60749-26.

(4)

Tested in accordance with JEDEC Standard 22, Test Method C101.

(5)

Tested in accordance with IEC 61000-4-4.

PACKAGE DISSIPATION RATINGS

PACKAGE

POWER RATING

POWER RATING

POWER RATING

POWER RATING

597 mW

4.97 mW/

°C

373 mW

298 mW

100 mW

990 mW

8.26 mW/

°C

620 mW

496 mW

165 mW

P

1290 mW

10.75 mW/

°C

806 mW

645 mW

215 mW

(1)

This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.

(2)

Tested in accordance with the Low-K thermal metric definitions of EIA/JESD51-3.

(3)

Tested in accordance with the High-K thermal metric definitions of EIA/JESD51-7.

2

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© 2002–2011, Texas Instruments Incorporated

Product Folder Link(s): SN65HVD10, SN65HVD10Q, SN75HVD10 SN65HVD11, SN65HVD11Q, SN75HVD11

SN65HVD12, SN75HVD12