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UCC27210DR Datasheet(PDF) 9 Page - Texas Instruments |
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UCC27210DR Datasheet(HTML) 9 Page - Texas Instruments |
9 / 33 page UCC27210 UCC27211 www.ti.com SLUSAT7C – NOVEMBER 2011 – REVISED MARCH 2012 TERMINAL FUNCTIONS PIN PIN NAME DESCRIPTION D/DDA/DRM DPR Positive supply to the lower-gate driver. De-couple this pin to VSS (GND). Typical VDD 1 1 decoupling capacitor range is 0.22 µF to 1.0 µF. High-side bootstrap supply. The bootstrap diode is on-chip but the external bootstrap capacitor is required. Connect positive side of the bootstrap capacitor to this pin. HB 2 2 Typical range of HB bypass capacitor is 0.022 µF to 0.1 µF. The capacitor value is dependant on the gate charge of the high-side MOSFET and should also be selected based on speed and ripple criteria HO 3 3 High-side output. Connect to the gate of the high-side power MOSFET. High-side source connection. Connect to source of high-side power MOSFET. HS 4 4 Connect the negative side of bootstrap capacitor to this pin. HI 5 7 High-side input. LI 6 8 Low-side input. VSS 7 9 Negative supply terminal for the device which is generally grounded. LO 8 10 Low-side output. Connect to the gate of the low-side power MOSFET. N/C - 5/6 Not Connected. Utilized on the DDA, DRM and DPR packages only. Electrically referenced to VSS PowerPAD™(1) Pad Pad (GND). Connect to a large thermal mass trace or GND plane to dramatically improve thermal performance. (1) The PowerPAD™ is not directly connected to any leads of the package. However it is electrically and thermally connected to the substrate which is the ground of the device. Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): UCC27210 UCC27211 |
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