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24LC16B Datasheet(PDF) 7 Page - Microchip Technology |
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24LC16B Datasheet(HTML) 7 Page - Microchip Technology |
7 / 40 page 2002-2012 Microchip Technology Inc. DS21703L-page 7 24AA16/24LC16B 5.0 DEVICE ADDRESSING A control byte is the first byte received following the Start condition from the master device (Figure 5-1). The control byte consists of a four-bit control code. For the 24XX16, this is set as ‘1010’ binary for read and write operations. The next three bits of the control byte are the block-select bits (B2, B1, B0). They are used by the master device to select which of the eight 256 word-blocks of memory are to be accessed. These bits are in effect the three Most Significant bits (MSb) of the word address. It should be noted that the protocol limits the size of the memory to eight blocks of 256 words, therefore, the protocol can support only one 24XX16 per system. The last bit of the control byte defines the operation to be performed. When set to ‘ 1’, a read operation is selected. When set to ‘ 0’, a write operation is selected. Following the Start condition, the 24XX16 monitors the SDA bus, checking the device type identifier being transmitted and, upon receiving a ‘ 1010’ code, the slave device outputs an Acknowledge signal on the SDA line. Depending on the state of the R/W bit, the 24XX16 will select a read or write operation. FIGURE 5-1: CONTROL BYTE ALLOCATION FIGURE 5-2: ADDRESS SEQUENCE BIT ASSIGNMENTS Operation Control Code Block Select R/W Read 1010 Block Address 1 Write 1010 Block Address 0 10 1 0 B2 B1 B0 R/W ACK Start Bit Read/Write Bit S Slave Address Acknowledge Bit Control Code Block Select Bits 1 010 B 2 B 1 B 0 R/W A 7 A 0 •• • • • • Control Byte Address Low Byte Control Code Block Select bits |
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Similar Description - 24LC16B |
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