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LCMXO2-256ZE-1UMG64C Datasheet(PDF) 8 Page - Lattice Semiconductor |
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LCMXO2-256ZE-1UMG64C Datasheet(HTML) 8 Page - Lattice Semiconductor |
8 / 106 page 2-4 Architecture MachXO2 Family Data Sheet Table 2-2. Slice Signal Descriptions Modes of Operation Each slice has up to four potential modes of operation: Logic, Ripple, RAM and ROM. Logic Mode In this mode, the LUTs in each slice are configured as 4-input combinatorial lookup tables. A LUT4 can have 16 possible input combinations. Any four input logic functions can be generated by programming this lookup table. Since there are two LUT4s per slice, a LUT5 can be constructed within one slice. Larger look-up tables such as LUT6, LUT7 and LUT8 can be constructed by concatenating other slices. Note LUT8 requires more than four slices. Ripple Mode Ripple mode supports the efficient implementation of small arithmetic functions. In Ripple mode, the following func- tions can be implemented by each slice: • Addition 2-bit • Subtraction 2-bit • Add/subtract 2-bit using dynamic control • Up counter 2-bit • Down counter 2-bit • Up/down counter with asynchronous clear • Up/down counter with preload (sync) • Ripple mode multiplier building block • Multiplier support • Comparator functions of A and B inputs – A greater-than-or-equal-to B – A not-equal-to B – A less-than-or-equal-to B Function Type Signal Names Description Input Data signal A0, B0, C0, D0 Inputs to LUT4 Input Data signal A1, B1, C1, D1 Inputs to LUT4 Input Multi-purpose M0/M1 Multi-purpose input Input Control signal CE Clock enable Input Control signal LSR Local set/reset Input Control signal CLK System clock Input Inter-PFU signal FCIN Fast carry in 1 Output Data signals F0, F1 LUT4 output register bypass signals Output Data signals Q0, Q1 Register outputs Output Data signals OFX0 Output of a LUT5 MUX Output Data signals OFX1 Output of a LUT6, LUT7, LUT8 2 MUX depending on the slice Output Inter-PFU signal FCO Fast carry out 1 1. See Figure 2-3 for connection details. 2. Requires two PFUs. |
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